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Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU
From: |
Maciej W. Rozycki |
Subject: |
Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU |
Date: |
Sun, 21 Oct 2018 16:21:45 +0100 (BST) |
User-agent: |
Alpine 2.21 (LFD 202 2017-01-01) |
Hi Fredrik,
> > The C790 is a follow-up to the R5900. The R5900 has an FPU that is not
> > compliant to the IEEE 754 standard for floating-point arithmetic. It
> > doesn't implement exceptions, infinities, NaNs or denormals. It doesn't
> > implement the the double format either, but that is really tangential,
> > because the same was the case with the IDT R4650, which had a standard
> > IEEE 754 FPU, but no double format either. Finally it has some anomalies
> > in the FP instruction set; not all opcode encodings are standard.
>
> Do you know where one might find a list of the nonstandard FP instructions?
>
> The command
>
> % grep 'FP_.*EE' binutils/opcodes/mips-opc.c
>
> gives a list of candidates, I suppose?
Yeah, those that have EE in `membership' are extra and those that have EE
in `exclusions' are missing.
See also: <https://sourceware.org/ml/binutils/2012-11/msg00360.html>.
Maciej