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Re: [Qemu-devel] [PATCH 12/28] target/riscv: Convert RV32D insns to deco
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] [PATCH 12/28] target/riscv: Convert RV32D insns to decodetree |
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Date: |
Sat, 13 Oct 2018 10:42:19 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0 |
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_fmadd_d(DisasContext *ctx, arg_fmadd_d *a, uint32_t insn)
> +{
> + gen_set_rm(ctx, a->rm);
> + gen_helper_fmadd_d(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1],
> + cpu_fpr[a->rs2], cpu_fpr[a->rs3]);
> + return true;
> +}
Missing REQUIRE_FPU in all of the arith helpers.
r~
- Re: [Qemu-devel] [PATCH 25/28] target/riscv: Remove manual decoding of RV32/64M insn, (continued)
- [Qemu-devel] [PATCH 19/28] target/riscv: Replace gen_branch() with trans_branch(), Bastian Koppelmann, 2018/10/12
- [Qemu-devel] [PATCH 23/28] target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists, Bastian Koppelmann, 2018/10/12
- [Qemu-devel] [PATCH 28/28] target/riscv: Replace gen_exception_illegal with return false, Bastian Koppelmann, 2018/10/12
- [Qemu-devel] [PATCH 13/28] target/riscv: Convert RV64D insns to decodetree, Bastian Koppelmann, 2018/10/12
- [Qemu-devel] [PATCH 12/28] target/riscv: Convert RV32D insns to decodetree, Bastian Koppelmann, 2018/10/12
- Re: [Qemu-devel] [PATCH 12/28] target/riscv: Convert RV32D insns to decodetree,
Richard Henderson <=
- [Qemu-devel] [PATCH 20/28] target/riscv: Replace gen_load() with trans_load(), Bastian Koppelmann, 2018/10/12
- [Qemu-devel] [PATCH 22/28] target/riscv: Move gen_arith_imm() decoding into trans_* functions, Bastian Koppelmann, 2018/10/12