Re: [Qemu-devel] [RFC] target/xtensa: rework zero overhead loops implementation

[Max Filippov]

Hi Richard,

thank you for taking a look.

On Thu, Oct 4, 2018 at 2:13 PM Richard Henderson
<address@hidden> wrote:
> Think first about how, if PC >= LEND or LEND - PC > PAGE_SIZE, that all of the
> loop stuff is irrelevant because we won't hit LEND within this TB.
>
> Think second about how to represent the common case -- how LOOP sets LBEG and
> LEND together.  That is, LEND - LBEG <= 256.  So, usually, we can also have an
> exact representation of LBEG and have a direct link rather than an indirect
> link.

I tried similar thing as a followup to my original patch, recording entire LBEG
in the cs_base -- surprisingly to me it made no measurable difference on my
tests.

>  But I presume that one can play games with special registers to create
> ranges that LOOP won't.  So we need some setting that will indicate that.
>
> Consider CS_BASE fields:
>
>   [12: 0]  EDIF = LEND - PC, if PC < LEND && LEND - PC < 2*PAGE_SIZE, or 0.

That has the same issue as my original patch: two TBs with PC > LEND
in both may be linked together, and then LEND may change, so that
PC1 > LEND and PC2 < LEND.
But I guess always storing low 13 bits of LEND - PC should work?
I'll play with it...

-- 
Thanks.
-- Max