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[Qemu-devel] [PATCH 02/13] target/arm: Define new EXCP type for v8M stac
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 02/13] target/arm: Define new EXCP type for v8M stack overflows |
Date: |
Tue, 2 Oct 2018 17:35:45 +0100 |
Define EXCP_STKOF, and arrange for it to cause us to take
a UsageFault with CFSR.STKOF set.
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.h | 2 ++
target/arm/helper.c | 5 +++++
2 files changed, 7 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index d2c1d005ed7..318792823b9 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -56,6 +56,7 @@
#define EXCP_SEMIHOST 16 /* semihosting call */
#define EXCP_NOCP 17 /* v7M NOCP UsageFault */
#define EXCP_INVSTATE 18 /* v7M INVSTATE UsageFault */
+#define EXCP_STKOF 19 /* v8M STKOF UsageFault */
/* NB: add new EXCP_ defines to the array in arm_log_exception() too */
#define ARMV7M_EXCP_RESET 1
@@ -1380,6 +1381,7 @@ FIELD(V7M_CFSR, UNDEFINSTR, 16 + 0, 1)
FIELD(V7M_CFSR, INVSTATE, 16 + 1, 1)
FIELD(V7M_CFSR, INVPC, 16 + 2, 1)
FIELD(V7M_CFSR, NOCP, 16 + 3, 1)
+FIELD(V7M_CFSR, STKOF, 16 + 4, 1)
FIELD(V7M_CFSR, UNALIGNED, 16 + 8, 1)
FIELD(V7M_CFSR, DIVBYZERO, 16 + 9, 1)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 6ed8631dbee..c303dc453f1 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7511,6 +7511,7 @@ static void arm_log_exception(int idx)
[EXCP_SEMIHOST] = "Semihosting call",
[EXCP_NOCP] = "v7M NOCP UsageFault",
[EXCP_INVSTATE] = "v7M INVSTATE UsageFault",
+ [EXCP_STKOF] = "v8M STKOF UsageFault",
};
if (idx >= 0 && idx < ARRAY_SIZE(excnames)) {
@@ -7666,6 +7667,10 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure);
env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVSTATE_MASK;
break;
+ case EXCP_STKOF:
+ armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure);
+ env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_STKOF_MASK;
+ break;
case EXCP_SWI:
/* The PC already points to the next instruction. */
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC, env->v7m.secure);
--
2.19.0
- [Qemu-devel] [PATCH 00/13] target/arm: Implement v8M stack limit checks, Peter Maydell, 2018/10/02
- [Qemu-devel] [PATCH 03/13] target/arm: Move v7m_using_psp() to internals.h, Peter Maydell, 2018/10/02
- [Qemu-devel] [PATCH 01/13] target/arm: Define new TBFLAG for v8M stack checking, Peter Maydell, 2018/10/02
- [Qemu-devel] [PATCH 02/13] target/arm: Define new EXCP type for v8M stack overflows,
Peter Maydell <=
- [Qemu-devel] [PATCH 05/13] target/arm: Add some comments in Thumb decode, Peter Maydell, 2018/10/02
- [Qemu-devel] [PATCH 04/13] target/arm: Add v8M stack checks on ADD/SUB/MOV of SP, Peter Maydell, 2018/10/02
- [Qemu-devel] [PATCH 09/13] target/arm: Add v8M stack checks for Thumb2 LDM/STM, Peter Maydell, 2018/10/02