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[Qemu-devel] [PULL 07/21] aspeed/i2c: interrupts should be cleared by so
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 07/21] aspeed/i2c: interrupts should be cleared by software only |
Date: |
Tue, 25 Sep 2018 14:41:30 +0100 |
From: Cédric Le Goater <address@hidden>
aspeed i2c interrupts should be cleared by software only, and the bus
interrupt should be lowered when all interrupts have been cleared.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
[PMM: drop TODO comment describing an issue which is
fixed later in the patch series, and clean up commit message]
Signed-off-by: Peter Maydell <address@hidden>
---
hw/i2c/aspeed_i2c.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index c762c7366ad..9a3a232fb89 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -52,6 +52,13 @@
#define I2CD_AC_TIMING_REG2 0x08 /* Clock and AC Timing Control #1 */
#define I2CD_INTR_CTRL_REG 0x0c /* I2CD Interrupt Control */
#define I2CD_INTR_STS_REG 0x10 /* I2CD Interrupt Status */
+
+#define I2CD_INTR_SLAVE_ADDR_MATCH (0x1 << 31) /* 0: addr1 1: addr2 */
+#define I2CD_INTR_SLAVE_ADDR_RX_PENDING (0x1 << 30)
+/* bits[19-16] Reserved */
+
+/* All bits below are cleared by writing 1 */
+#define I2CD_INTR_SLAVE_INACTIVE_TIMEOUT (0x1 << 15)
#define I2CD_INTR_SDA_DL_TIMEOUT (0x1 << 14)
#define I2CD_INTR_BUS_RECOVER_DONE (0x1 << 13)
#define I2CD_INTR_SMBUS_ALERT (0x1 << 12) /* Bus [0-3] only */
@@ -59,7 +66,7 @@
#define I2CD_INTR_SMBUS_DEV_ALERT_ADDR (0x1 << 10) /* Removed */
#define I2CD_INTR_SMBUS_DEF_ADDR (0x1 << 9) /* Removed */
#define I2CD_INTR_GCALL_ADDR (0x1 << 8) /* Removed */
-#define I2CD_INTR_SLAVE_MATCH (0x1 << 7) /* use RX_DONE */
+#define I2CD_INTR_SLAVE_ADDR_RX_MATCH (0x1 << 7) /* use RX_DONE */
#define I2CD_INTR_SCL_TIMEOUT (0x1 << 6)
#define I2CD_INTR_ABNORMAL (0x1 << 5)
#define I2CD_INTR_NORMAL_STOP (0x1 << 4)
@@ -188,7 +195,6 @@ static void aspeed_i2c_bus_handle_cmd(AspeedI2CBus *bus,
uint64_t value)
{
bus->cmd &= ~0xFFFF;
bus->cmd |= value & 0xFFFF;
- bus->intr_status = 0;
if (bus->cmd & I2CD_M_START_CMD) {
uint8_t state = aspeed_i2c_get_state(bus) & I2CD_MACTIVE ?
@@ -284,8 +290,10 @@ static void aspeed_i2c_bus_write(void *opaque, hwaddr
offset,
break;
case I2CD_INTR_STS_REG:
bus->intr_status &= ~(value & 0x7FFF);
- bus->controller->intr_status &= ~(1 << bus->id);
- qemu_irq_lower(bus->controller->irq);
+ if (!bus->intr_status) {
+ bus->controller->intr_status &= ~(1 << bus->id);
+ qemu_irq_lower(bus->controller->irq);
+ }
break;
case I2CD_DEV_ADDR_REG:
qemu_log_mask(LOG_UNIMP, "%s: slave mode not implemented\n",
--
2.19.0
- [Qemu-devel] [PULL 02/21] hw/arm/exynos4210: fix Exynos4210 UART support, (continued)
- [Qemu-devel] [PULL 02/21] hw/arm/exynos4210: fix Exynos4210 UART support, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 01/21] target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 20/21] aspeed/smc: fix some alignment issues, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 05/21] arm: Add Nordic Semiconductor nRF51 SoC, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 19/21] hw/arm/aspeed: Add an Aspeed machine class, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 06/21] arm: Add BBC micro:bit machine, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 16/21] hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 08/21] aspeed/i2c: Handle receive command in separate function, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 21/21] target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 11/21] hw/arm/smmuv3: fix eventq recording and IRQ triggerring, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 07/21] aspeed/i2c: interrupts should be cleared by software only,
Peter Maydell <=
- [Qemu-devel] [PULL 13/21] hw/intc/arm_gic: Drop GIC_BASE_IRQ macro, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 15/21] hw/net/pcnet-pci: Unify pcnet_ioport_read/write and pcnet_mmio_read/write, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 12/21] hw/intc/arm_gic: Document QEMU interface, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 10/21] hw/arm/smmu-common: Fix the name of the iommu memory regions, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 09/21] aspeed/i2c: Fix receive done interrupt handling, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 17/21] aspeed/timer: fix compile breakage with clang 3.4.2, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 14/21] hw/net/pcnet-pci: Convert away from old_mmio accessors, Peter Maydell, 2018/09/25