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[Qemu-devel] [PATCH v2 06/11] aspeed/smc: fix default read value


From: Cédric Le Goater
Subject: [Qemu-devel] [PATCH v2 06/11] aspeed/smc: fix default read value
Date: Fri, 21 Sep 2018 18:19:34 +0200

0xFFFFFFFF should be returned for non implemented registers.

Also, the model should expose one control register per possible CS
even if there is no flash device attached. When testing the validity
of the register number in the read operation, replace 's->num_cs' by
'ctrl->max_slaves' which represents the maximum number of flash
devices a controller can handle.

Signed-off-by: Cédric Le Goater <address@hidden>
---
 hw/ssi/aspeed_smc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 1270842dcf0c..6045ca11b969 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -665,12 +665,12 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr 
addr, unsigned int size)
         addr == s->r_ce_ctrl ||
         addr == R_INTR_CTRL ||
         (addr >= R_SEG_ADDR0 && addr < R_SEG_ADDR0 + s->ctrl->max_slaves) ||
-        (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs)) {
+        (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->ctrl->max_slaves)) {
         return s->regs[addr];
     } else {
         qemu_log_mask(LOG_UNIMP, "%s: not implemented: 0x%" HWADDR_PRIx "\n",
                       __func__, addr);
-        return 0;
+        return -1;
     }
 }
 
-- 
2.17.1




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