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Re: [Qemu-devel] [PATCH 4/9] hw/arm/highbank: Connect VIRQ and VFIQ
From: |
Luc Michel |
Subject: |
Re: [Qemu-devel] [PATCH 4/9] hw/arm/highbank: Connect VIRQ and VFIQ |
Date: |
Wed, 22 Aug 2018 10:26:32 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0 |
On 8/21/18 3:28 PM, Peter Maydell wrote:
> Connect the VIRQ and VFIQ lines from the GIC to the CPU;
> these exist always for both CPU and GIC whether the
> virtualization extensions are enabled or not, so we
> can just unconditionally connect them.
>
> Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Luc Michel <address@hidden>
> ---
> hw/arm/highbank.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
> index 6d42fce2c37..fb9efa02c35 100644
> --- a/hw/arm/highbank.c
> +++ b/hw/arm/highbank.c
> @@ -243,6 +243,8 @@ static void calxeda_init(MachineState *machine, enum
> cxmachines machine_id)
> int n;
> qemu_irq cpu_irq[4];
> qemu_irq cpu_fiq[4];
> + qemu_irq cpu_virq[4];
> + qemu_irq cpu_vfiq[4];
> MemoryRegion *sysram;
> MemoryRegion *dram;
> MemoryRegion *sysmem;
> @@ -282,6 +284,8 @@ static void calxeda_init(MachineState *machine, enum
> cxmachines machine_id)
> object_property_set_bool(cpuobj, true, "realized", &error_fatal);
> cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ);
> cpu_fiq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ);
> + cpu_virq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_VIRQ);
> + cpu_vfiq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_VFIQ);
> }
>
> sysmem = get_system_memory();
> @@ -329,6 +333,8 @@ static void calxeda_init(MachineState *machine, enum
> cxmachines machine_id)
> for (n = 0; n < smp_cpus; n++) {
> sysbus_connect_irq(busdev, n, cpu_irq[n]);
> sysbus_connect_irq(busdev, n + smp_cpus, cpu_fiq[n]);
> + sysbus_connect_irq(busdev, n + 2 * smp_cpus, cpu_virq[n]);
> + sysbus_connect_irq(busdev, n + 3 * smp_cpus, cpu_vfiq[n]);
> }
>
> for (n = 0; n < 128; n++) {
>
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- Re: [Qemu-devel] [PATCH 8/9] hw/arm/vexpress: Don't set info->secure_boot if CPU doesn't have EL3, (continued)
- [Qemu-devel] [PATCH 7/9] hw/cpu/a15mpcore: If CPU has EL2, enable it on the GIC and wire it up, Peter Maydell, 2018/08/21
- [Qemu-devel] [PATCH 6/9] hw/arm/fsl-imx6ul: Connect VIRQ and VFIQ, Peter Maydell, 2018/08/21
- [Qemu-devel] [PATCH 5/9] hw/arm/fsl-imx6ul: Connect VIRQ and VFIQ, Peter Maydell, 2018/08/21
- [Qemu-devel] [PATCH 3/9] hw/arm/vexpress: Connect VIRQ and VFIQ, Peter Maydell, 2018/08/21
- [Qemu-devel] [PATCH 4/9] hw/arm/highbank: Connect VIRQ and VFIQ, Peter Maydell, 2018/08/21
- Re: [Qemu-devel] [PATCH 4/9] hw/arm/highbank: Connect VIRQ and VFIQ,
Luc Michel <=
- [Qemu-devel] [PATCH 2/9] hw/intc/arm_gic: Make per-cpu GICH memory regions 0x200 bytes large, Peter Maydell, 2018/08/21
- [Qemu-devel] [PATCH 1/9] hw/intc/arm_gic: Document QEMU interface, Peter Maydell, 2018/08/21