[Qemu-devel] [PATCH v2 0/5] tcg: Reorg 128-bit atomic operations

[Richard Henderson]

The other day Emilio noticed that we weren't setting CONFIG_ATOMIC128
for x86_64, despite forcing -mcx16 on the command-line.  It seems that
gcc has changed behaviour with version 7.

There's a rather long discussion about this:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80878

It does not appear that gcc will ever quite align with our needs here.
I have added a second configure test, and have split the test to be 
used by the rest of QEMU into two compile-time constants.  This lets
us refactor the code a bit and remove some conditional compilation.

In addition, no version of gcc supports __sync_compare_and_swap_16
for aarch64.  Inline some asm for that case.

I've also checked power8, which does support CONFIG_ATOMIC128.

Changes since v1:
  * Fixed some errors in the lesser used paths (Emilio).
  * Dropped the target/s390x changes for now, as they conflict
    with other patches in-flight on list.
  * Raise EXCP_ATOMIC at translate time for AArch64, if needed.


r~


Richard Henderson (5):
  tcg: Split CONFIG_ATOMIC128
  target/i386: Convert to HAVE_CMPXCHG128
  target/arm: Convert to HAVE_CMPXCHG128
  target/arm: Check HAVE_CMPXCHG128 at transate time
  target/ppc: Convert to HAVE_CMPXCHG128 and HAVE_ATOMIC128

 accel/tcg/atomic_template.h |  20 ++-
 include/qemu/atomic128.h    | 155 ++++++++++++++++++++++
 target/ppc/helper.h         |   2 +-
 tcg/tcg.h                   |  16 ++-
 accel/tcg/cputlb.c          |   3 +-
 accel/tcg/user-exec.c       |   5 +-
 target/arm/helper-a64.c     | 251 ++++++++++++++++++------------------
 target/arm/translate-a64.c  |  38 +++---
 target/i386/mem_helper.c    |   9 +-
 target/ppc/mem_helper.c     |  33 ++++-
 target/ppc/translate.c      | 115 +++++++++--------
 configure                   |  19 +++
 12 files changed, 443 insertions(+), 223 deletions(-)
 create mode 100644 include/qemu/atomic128.h

-- 
2.17.1