Re: [Qemu-devel] [PATCH v11 00/46] Add nanoMIPS support - core functionality and system mode

[Aleksandar Markovic]

> From: Aleksandar Markovic <address@hidden>
> Sent: Monday, August 20, 2018 8:16 PM
> 
> Subject: [PATCH v11 00/46] Add nanoMIPS support - core functionality and 
> system mode
> 
> From: Aleksandar Markovic <address@hidden>
> 

Hello,

I feel the patches in this series should be submitted in a pull request. Please 
let me know if you think otherwise.

The code review produced several significant improvements:

- LLWP/SCWP implementation is now up-to-date and correct
- nanoMIPS branches handling reimplemented
- removed all connections between nanoMIPS and M16 flag

All three improvements were initiated by Richard, to whom I say special thanks.

Aleksandar Markovic

> v10->v11:
> 
>   - all user-mode patches removed (separate series will be
>       created for them)
>   - added capability to implement availability control via CP0
>       Config3 and Config5 bits
>   - refactored accordingly availability control via XNP and MT
>   - added availability control via NMS
>   - fix for wrong mode switch to M16 now in a separate patch
>   - moderate cleanup of disassembler code
>   - rebased to the latest code
> 
> v9->v10:
> 
>   - first 15 patches removed since they are applied now to the
>     main tree
>   - completely removed connections to and dependance on
>       MIPS_HFLAG_M16 in nanoMIPS code
>   - completed reworking of nanoMIPS branch handling
>   - some fixes and improvements in DSP ASE patches
>   - other fixes and improvements that originate from code reviews
>   - rebased to the latest code
> 
> v8->v9:
> 
>   - reoganized (moved/squashed) patches so that clang build bisect
>      works (as the result, number of patches dropped from 87 to 84)
>   - re-examined and reworked 32-bit nanoMIPS branch instructions
>   - minor improvements in commit messages
>   - rebased to the latest code
> 
> v7->v8:
> 
>   - the series is slightly reorganized so that:
>       - patches 1-19 are fixes and improvements that are not
>       dependent on the existence of nanoMIPS (even though most
>       of them are logicaly connected to (and necessary for)
>       nanoMIPS support) - they fix and improve pre-nanoMIPS code
>       - patches 20-65 introduce core nanoMIPS functionality, but
>       do not contain any dependence on or reference to nanoMIPS
>       Linux ABI
>       - patches 66-87 mostly deal with Linux user mode-related
>       nanoMIPS functionality, therefore dependent on nanoMIPS
>       Linux ABI
>   - the series will probably be split into three (corresponding
>       to the organization mentioned above) in near future
>   - added support for availability control via bit config XNP
>   - fixed availabitily control for LLWP/SCWP
>   - added support for availability control via bit config MT
>   - fixed availabitily control for pre-nanoMIPS MT ASE
>   - fixed availabitily control for nanoMIPS MT ASE
>   - completely removed case-statements defined by integer range
>       from translate.c
>   - patch on nanoMIPS specifics in ELF headers split into two
>   - patch on GT64120-related functionality in nanoMIPS bootloader
>       updated with comments and reorganizes with respect to
>       endianness
>   - replaced one instance of shift/mask with extract32()
>   - fixed one instance of missing default case in decoding engine
>   - removed several instances of unnecessary default case in
>     decoding engine
>   - minor tweaks related to variable scope and naming
>   - fixed several spelling mistakes in commit messages
>   - rebased to the latest code
> 
> v6->v7:
> 
>   - found a better place for MIPS_ARCH in elf.h
>   - improved patch for LLWP and SCWP
>   - fixed missing availability control, alignment, usage
>     of extract32() in DSP patches
>   - added disassembler support for microMIPS and nanoMIPS
>   - removed unnecessary addition of one empty line in the
>     patch on WR bit
>   - improved statx() syscall translation
>   - improved nanoMIPS items in binfmt script
>   - amended pre-nanoMIPS items in qemu-doc.texi
>   - added nanoMIPS items in qemu-doc.texi
>   - changed slightly patch order to be logicaly more
>     comprehensive
>   - rebased to the latest code
>   - NOTE: there will be some sheckpatch.pl errors and warning
>     for this series; however, we think those are flase positives
>     in these particular circumstances - therefore we will not
>     change any patch related to these checkpatch.pl messages
> 
> v5->v6:
> 
>   - used names offset and imm instead of rd and rs when
>     appropriate
>   - used gen_op_addr_addi when appropriate in one more place
>   - avoided usage of tcg_temp_local_new
>   - avoided unnecessary sign extension related to addr_add
>   - fixed unprotected storing to cpu_gpr[0]
>   - removed some unnecessary testing for ISA_NANOMIPS
>   - updated patch for LLWP and SCWP
>   - extract32 inserted instead of shift/mask in DSP patches
>   - removed useless casts from DSP patches
>   - reorganized functions to eliminated duplicated loading of
>     gpr values into tcg variables in DSP patches
>   - check Config1.WR bit for Watch registers only when using
>     in runtime
>   - removed duplicated check for bad address in PC register
>   - added support for statx system call
>   - updated script qemu-binfmt-conf.sh for nanoMIPS
>   - rebased to the latest code
> 
> v4->v5:
> 
>   - merged series "Mips maintenance and misc fixes and improvements"
>     and this one for easier handling (there are build dependencies)
>   - eliminated shadow variables from translate.c
>   - replaced shift/mask combination with extract32()
>   - added new function gen_op_addr_addi()
>   - added patch for LLWP and SCWP
>   - added "fall through" comments at appropriate places
>   - eliminated micromips flag from I7200 definition
>   - numerous other enhancements originating from reviewer's
>     comments
>   - some of the patches split into two or more for easier
>     handling and review
>   - rebased to the latest code
> 
> v3->v4:
> 
>   - added support for nanoMIPS user mode functionality and
>     configuration
>   - DSP patch split into three for easier review and handling
>   - corrected indentation in all decoding engine patches
>   - shift/mask replaced with equivalent extract32() in some
>     patches
>   - added missing default cases in some patches
>   - refactored invocation logic aroung decode_nanomips_opc()
>   - improved comments before decode_gpr_XXX() utilities
>   - all four decode_gpr_XXX() are now in a single patch
>   - two patches on updating BadInstr and related registers
>     are now merged, and execution logic improved
>   - minor formatting corrections
>   - rebased to the latest code
> 
> v2->v3:
> 
>   - added support for nanoMIPS-specifics in ELF headers
>   - added support for CP0 Config0.WR bit
>   - updated I7200 definition
>   - improved indentation of some switch statements
>   - slight reorganization of patches (splitting, order)
>   - rebased to the latest code
> 
> v1->v2:
> 
>   - added DSP ASE support
>   - added MT ASE support
>   - added GDB XML support
>   - order of patches changed
>   - commit messages and patch title improved across the board
>   - obsolete email addresses for authors and cosigners replaced
>     with the right ones
>   - some functions renamed to reflect better the documentation
>   - some macros renamed to reflect better their nanoMIPS nature
>   - streamlined formatting
>   - some of other reviewer's comments addressed, but the majority
>     was not; this is because the focus of this version was on
>     completing the functionality as much as possible; remaining
>     comments will be addressed in the subsequent versions of this
>     series