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[Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability
From: |
Jing Liu |
Subject: |
[Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability to legacy PCI bridge |
Date: |
Tue, 21 Aug 2018 11:18:07 +0800 |
Add hint to firmware (e.g. SeaBIOS) to reserve addtional
BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the
resource reserve capability deleting in pci_bridge_dev_exitfn.
Signed-off-by: Jing Liu <address@hidden>
---
hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c
index b2d861d..97a8e8b 100644
--- a/hw/pci-bridge/pci_bridge_dev.c
+++ b/hw/pci-bridge/pci_bridge_dev.c
@@ -46,6 +46,9 @@ struct PCIBridgeDev {
uint32_t flags;
OnOffAuto msi;
+
+ /* additional resources to reserve */
+ PCIResReserve res_reserve;
};
typedef struct PCIBridgeDev PCIBridgeDev;
@@ -95,6 +98,12 @@ static void pci_bridge_dev_realize(PCIDevice *dev, Error
**errp)
error_free(local_err);
}
+ err = pci_bridge_qemu_reserve_cap_init(dev, 0,
+ bridge_dev->res_reserve, errp);
+ if (err) {
+ goto cap_error;
+ }
+
if (shpc_present(dev)) {
/* TODO: spec recommends using 64 bit prefetcheable BAR.
* Check whether that works well. */
@@ -103,6 +112,8 @@ static void pci_bridge_dev_realize(PCIDevice *dev, Error
**errp)
}
return;
+cap_error:
+ msi_uninit(dev);
msi_error:
slotid_cap_cleanup(dev);
slotid_error:
@@ -116,6 +127,8 @@ shpc_error:
static void pci_bridge_dev_exitfn(PCIDevice *dev)
{
PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
+
+ pci_del_capability(dev, PCI_CAP_ID_VNDR, sizeof(PCIBridgeQemuCap));
if (msi_present(dev)) {
msi_uninit(dev);
}
@@ -162,6 +175,17 @@ static Property pci_bridge_dev_properties[] = {
ON_OFF_AUTO_AUTO),
DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags,
PCI_BRIDGE_DEV_F_SHPC_REQ, true),
+ DEFINE_PROP_UINT32("bus-reserve", PCIBridgeDev,
+ res_reserve.bus, -1),
+ DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
+ res_reserve.io, -1),
+ DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
+ res_reserve.mem_non_pref, -1),
+ DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
+ res_reserve.mem_pref_32, -1),
+ DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
+ res_reserve.mem_pref_64, -1),
+
DEFINE_PROP_END_OF_LIST(),
};
--
1.8.3.1
- [Qemu-devel] [PATCH v3 0/2] hw/pci: PCI resource reserve capability, Jing Liu, 2018/08/20
- [Qemu-devel] [PATCH v3 1/2] hw/pci: factor PCI reserve resources to a separate structure, Jing Liu, 2018/08/20
- [Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability to legacy PCI bridge,
Jing Liu <=
- Re: [Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability to legacy PCI bridge, Marcel Apfelbaum, 2018/08/21
- Re: [Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability to legacy PCI bridge, Liu, Jing2, 2018/08/21
- Re: [Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability to legacy PCI bridge, Marcel Apfelbaum, 2018/08/22
- Re: [Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability to legacy PCI bridge, Liu, Jing2, 2018/08/23
- Re: [Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability to legacy PCI bridge, Marcel Apfelbaum, 2018/08/24
- Re: [Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability to legacy PCI bridge, Liu, Jing2, 2018/08/26
- Re: [Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability to legacy PCI bridge, Liu, Jing2, 2018/08/29