Re: [Qemu-devel] Simulating a composite machine

[Peter Maydell]

On 19 August 2018 at 13:54, Martin Schroeder via Qemu-devel
<address@hidden> wrote:
> Is it possible to instantiate multiple CPUs of different architectures
> and simuate them with different images at the same time? Some examples
> include ARM socs with m3/m4 coprocessor core but also boards with
> multiple processors where it is desirable to connect the chips over
> for example virtual SPI or UART and then simulate the composite system
> as a single machine where each of the cores runs a separate firmware.

Not currently, no. There's some out of tree stuff various people
have done involving connecting up separate QEMU processes.

> Is something like this easy to implement given current processor
> objects or does this require substantial changes to how qemu works?
> One area I do not fully understand is native code generator and
> whether it would be able to cope with two cores of *different*
> architectures at the same time.

At the moment some bits of our core code assume all the CPUs
in the system are basically identical (shared code cache, etc).
I'm planning to do some work to fix the simpler parts of this,
so you can have two different CPUs of the same architecture
in a system (eg a Cortex-M4 with an FPU plus one without an FPU,
or an M3 and an A-class core). Multiple completely different
architectures (eg Microblaze + ARM, or ARM + PPC) is rather
harder, as at the moment we build entirely separate
qemu-system-* binaries for each architecture and there are
some compile-time assumptions made. I'd like to see us work
towards making that possible, but there's potentially quite
a bit of effort required.

thanks
-- PMM