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[Qemu-devel] [PULL 32/45] arm: Fix return code of arm_load_elf
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 32/45] arm: Fix return code of arm_load_elf |
Date: |
Tue, 14 Aug 2018 19:18:02 +0100 |
From: Adam Lackorzynski <address@hidden>
Use an int64_t as a return type to restore
the negative check for arm_load_as.
Signed-off-by: Adam Lackorzynski <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/boot.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index e09201cc97c..ca9467e583f 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -818,9 +818,9 @@ static int do_arm_linux_init(Object *obj, void *opaque)
return 0;
}
-static uint64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
- uint64_t *lowaddr, uint64_t *highaddr,
- int elf_machine, AddressSpace *as)
+static int64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
+ uint64_t *lowaddr, uint64_t *highaddr,
+ int elf_machine, AddressSpace *as)
{
bool elf_is64;
union {
@@ -829,7 +829,7 @@ static uint64_t arm_load_elf(struct arm_boot_info *info,
uint64_t *pentry,
} elf_header;
int data_swab = 0;
bool big_endian;
- uint64_t ret = -1;
+ int64_t ret = -1;
Error *err = NULL;
--
2.18.0
- [Qemu-devel] [PULL 15/45] vmstate.h: Provide VMSTATE_UINT16_SUB_ARRAY, (continued)
- [Qemu-devel] [PULL 15/45] vmstate.h: Provide VMSTATE_UINT16_SUB_ARRAY, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 35/45] target/arm: Honour HCR_EL2.TGE when raising synchronous exceptions, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 36/45] target/arm: Provide accessor functions for HCR_EL2.{IMO, FMO, AMO}, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 10/45] target/arm: Allow execution from small regions, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 12/45] intc/arm_gic: Refactor operations on the distributor, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 13/45] intc/arm_gic: Implement GICD_ISACTIVERn and GICD_ICACTIVERn registers, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 22/45] intc/arm_gic: Implement virtualization extensions in gic_acknowledge_irq, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 19/45] intc/arm_gic: Refactor secure/ns access check in the CPU interface, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 24/45] intc/arm_gic: Implement virtualization extensions in gic_cpu_(read|write), Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 31/45] arm/virt: Add support for GICv2 virtualization extensions, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 32/45] arm: Fix return code of arm_load_elf,
Peter Maydell <=
- [Qemu-devel] [PULL 34/45] target/arm: Honour HCR_EL2.TGE and MDCR_EL2.TDE in debug register access checks, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 38/45] target/arm: Improve exception-taken logging, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 39/45] target/arm: Initialize exc_secure correctly in do_v7m_exception_exit(), Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 41/45] target/arm: Implement tailchaining for M profile cores, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 45/45] target/arm: Fix typo in helper_sve_movz_d, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 20/45] intc/arm_gic: Add virtualization enabled IRQ helper functions, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 21/45] intc/arm_gic: Implement virtualization extensions in gic_(activate_irq|drop_prio), Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 42/45] target/arm: Fix sign of sve_cmpeq_ppzw/sve_cmpne_ppzw, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 27/45] intc/arm_gic: Implement gic_update_virt() function, Peter Maydell, 2018/08/14
- [Qemu-devel] [PULL 44/45] target/arm: Reorganize SVE WHILE, Peter Maydell, 2018/08/14