Re: [Qemu-devel] [PATCH v3 18/40] target/mips: Add emulation of nanoMIPS 32-bit load and store instructions

[Aleksandar Markovic]

Hello, Richard. Sorry for bothering you. One more question.

> On 07/19/2018 05:54 AM, Stefan Markovic wrote:
> > +        case NM_ADDIUGP_B:
> > +            gen_arith_imm(ctx, OPC_ADDIU, rt, 28, u);
> > +            break;
>
> Use gen_op_addr_add, since behaves_like('DADDIU[GP.B]').

Did you perhaps mean an implementation similar to this would be appropriate:

case NM_ADDIUGP_B:
    if (rt != 0) { 
        uint32_t offset = extract32(ctx->opcode, 0, 18); 
        if (offset == 0) { 
            gen_load_gpr(cpu_gpr[rt], 28); 
        } else { 
            TCGv t0; 
            t0 = tcg_temp_new(); 
            tcg_gen_movi_tl(t0, offset); 
            gen_op_addr_add(ctx, cpu_gpr[rt], cpu_gpr[28], t0); 
            tcg_temp_free(t0); 
        } 
    }
    break;

(this is like NM_ADDIUGP_W implementation)

Aleksandar M.