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Re: [Qemu-devel] [PATCH] aspeed: Implement write-1-{set, clear} for AST2
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From: |
Andrew Jeffery |
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Subject: |
Re: [Qemu-devel] [PATCH] aspeed: Implement write-1-{set, clear} for AST2500 strapping |
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Date: |
Fri, 13 Jul 2018 01:40:30 +0930 |
On Fri, 13 Jul 2018, at 01:28, Peter Maydell wrote:
> On 9 July 2018 at 15:35, Andrew Jeffery <address@hidden> wrote:
> > The AST2500 SoC family changes the runtime behaviour of the hardware
> > strapping register (SCU70) to write-1-set/write-1-clear, with
> > write-1-clear implemented on the "read-only" SoC revision register
> > (SCU7C). For the the AST2400, the hardware strapping is
> > runtime-configured with read-modify-write semantics.
> >
> > Signed-off-by: Andrew Jeffery <address@hidden>
> > ---
>
> Hi -- is this a bugfix suitable for 3.0, or something you'd
> like to wait until 3.1 ? The commit message sounds like a bugfix...
If we could get it into 3.0 that would be great. I ran into a case where the
distinction was important so it would be good to have it resolved sooner rather
than later.
Cheers,
Andrew