[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH] nvic: Change NVIC to support ARMv6-M
From: |
Stefan Hajnoczi |
Subject: |
Re: [Qemu-devel] [PATCH] nvic: Change NVIC to support ARMv6-M |
Date: |
Thu, 12 Jul 2018 11:05:06 +0100 |
User-agent: |
Mutt/1.10.0 (2018-05-17) |
On Wed, Jul 11, 2018 at 02:33:14PM +0100, Peter Maydell wrote:
> On 11 July 2018 at 14:25, Stefan Hajnoczi <address@hidden> wrote:
> > On Tue, Jul 10, 2018 at 06:33:35PM +0300, Julia Suvorova via Qemu-devel
> > wrote:
> >> The differences from ARMv7-M NVIC are:
> >> * ARMv6-M only supports up to 32 external interrupts
> >> (configurable feature already). The ICTR is reserved.
> >> * Active Bit Register is reserved.
> >> * ARMv6-M supports 4 priority levels against 256 in ARMv7-M.
> >>
> >> Signed-off-by: Julia Suvorova <address@hidden>
> >> ---
> >> hw/intc/armv7m_nvic.c | 29 +++++++++++++++++++++++++----
> >> 1 file changed, 25 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
> >> index 38aaf3dc8e..8545c87caa 100644
> >> --- a/hw/intc/armv7m_nvic.c
> >> +++ b/hw/intc/armv7m_nvic.c
> >> @@ -420,6 +420,10 @@ static void set_prio(NVICState *s, unsigned irq, bool
> >> secure, uint8_t prio)
> >> assert(irq > ARMV7M_EXCP_NMI); /* only use for configurable prios */
> >> assert(irq < s->num_irq);
> >>
> >> + if (!arm_feature(&s->cpu->env, ARM_FEATURE_V7)) {
> >
> > ARMv8-M also has the NVIC:
> > https://static.docs.arm.com/ddi0553/a/DDI0553A_e_armv8m_arm.pdf
> >
> > Should arm_feature(&s->cpu->env, ARM_FEATURE_V6) be used instead of
> > !arm_feature(&s->cpu->env, ARM_FEATURE_V7)?
>
> All of v6M, v7M and v8M cores will set ARM_FEATURE_V6, so
> testing on it doesn't distinguish them.
Okay.
Stefan
signature.asc
Description: PGP signature