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[Qemu-devel] [PULL 6/6] cpu: Assert asidx_from_attrs return value in ran
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 6/6] cpu: Assert asidx_from_attrs return value in range |
Date: |
Mon, 2 Jul 2018 09:05:46 -0700 |
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
include/qom/cpu.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index cce2fd6acc..bd796579ee 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -620,11 +620,13 @@ static inline hwaddr cpu_get_phys_page_debug(CPUState
*cpu, vaddr addr)
static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
+ int ret = 0;
if (cc->asidx_from_attrs) {
- return cc->asidx_from_attrs(cpu, attrs);
+ ret = cc->asidx_from_attrs(cpu, attrs);
+ assert(ret < cpu->num_ases && ret >= 0);
}
- return 0;
+ return ret;
}
#endif
--
2.17.1
- [Qemu-devel] [PULL 0/6] tcg queued patches, Richard Henderson, 2018/07/02
- [Qemu-devel] [PULL 1/6] translate-all: fix locking of TBs whose two pages share the same physical page, Richard Henderson, 2018/07/02
- [Qemu-devel] [PULL 3/6] accel/tcg: Correct "is this a TLB miss" check in get_page_addr_code(), Richard Henderson, 2018/07/02
- [Qemu-devel] [PULL 2/6] tcg: Define and use new tlb_hit() and tlb_hit_page() functions, Richard Henderson, 2018/07/02
- [Qemu-devel] [PULL 4/6] accel/tcg: Don't treat invalid TLB entries as needing recheck, Richard Henderson, 2018/07/02
- [Qemu-devel] [PULL 5/6] accel/tcg: Avoid caching overwritten tlb entries, Richard Henderson, 2018/07/02
- [Qemu-devel] [PULL 6/6] cpu: Assert asidx_from_attrs return value in range,
Richard Henderson <=
- Re: [Qemu-devel] [PULL 0/6] tcg queued patches, Peter Maydell, 2018/07/02