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Re: [Qemu-devel] [PATCH v2 0/5] Add Icelake CPU model


From: no-reply
Subject: Re: [Qemu-devel] [PATCH v2 0/5] Add Icelake CPU model
Date: Sun, 1 Jul 2018 19:31:34 -0700 (PDT)

Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v2 0/5] Add Icelake CPU model

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
0a526568ba i386: Add new CPU model Icelake-{Server, Client}
4d6628a55b i386: Add CPUID bit for WBNOINVD
16a4ad0cfe i386: Add CPUID bit for PCONFIG
244c40c403 i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR
3139b1bf60 i386: Add support for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES MSRs

=== OUTPUT BEGIN ===
Checking PATCH 1/5: i386: Add support for IA32_PRED_CMD and 
IA32_ARCH_CAPABILITIES MSRs...
Checking PATCH 2/5: i386: Add CPUID bit and feature words for 
IA32_ARCH_CAPABILITIES MSR...
ERROR: line over 90 characters
#34: FILE: target/i386/cpu.h:691:
+#define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29)  /*Arch Capabilities of 
RDCL_NO and IBRS_ALL*/

total: 1 errors, 0 warnings, 15 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 3/5: i386: Add CPUID bit for PCONFIG...
Checking PATCH 4/5: i386: Add CPUID bit for WBNOINVD...
ERROR: line over 90 characters
#33: FILE: target/i386/cpu.h:695:
+#define CPUID_8000_0008_EBX_WBNOINVD  (1U << 9)  /* Write back and do not 
invalidate cache */

total: 1 errors, 0 warnings, 15 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 5/5: i386: Add new CPU model Icelake-{Server, Client}...
=== OUTPUT END ===

Test command exited with code: 1


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