On 25 June 2018 at 14:12, Gerd Hoffmann <address@hidden> wrote:
Currently, the HDA device tries to sync itself with the QEMU audio
backend by waiting for the guest driver to handle buffer completion
interrupts. This causes the backend to often read too much data from the
device, as well as running out of data whenever the guest takes too long
to handle the interrupt.
According to the HDA specification, the guest is also not required to
use interrupts, but can also sync itself by polling the LPIB registers.
This patch will introduce high frequency (1000Hz) timers that interface
with the device and allow for much smoother emulation of the LPIB
registers. Since the timing is now provided by these timers, the need
to wait for buffer completion interrupts also ceases.
+static inline int64_t hda_bytes_per_second(HDAAudioStream *st)
+{
+ return 2 * st->as.nchannels * st->as.freq;
+}
Hi; Coverity warns about this expression because the
multiplication is done as a 32-bit multiply and the
result is returned as a 64-bit (CID 1393631). As usual,
a suitable cast would fix it.