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Re: [Qemu-devel] [Qemu-arm] [PATCH v3 0/8] arm: implement TZ MPC


From: Peter Maydell
Subject: Re: [Qemu-devel] [Qemu-arm] [PATCH v3 0/8] arm: implement TZ MPC
Date: Fri, 22 Jun 2018 11:06:08 +0100

On 20 June 2018 at 14:20, Peter Maydell <address@hidden> wrote:
> Hi; this is v3 of my iommu patchset. All the IOMMU stuff is now
> in master, so the remaining part is just implementing and using
> the Trustzone Memory Protection Controller in the mps2-an505.
>
> Changes from v2 to v3 (all fairly minor):
>  * add new variable to clarify sense of LUT bits
>  * only autoinc the IDX register if CTRL.AUTOINC is set
>  * NS accesses should see IDregs only
>    (The datasheet is unclear on the exact behaviour on an
>    NS access to a non-ID register, so I've made a best guess
>    and had them RAZ/WI. This behaviour is not reachable for
>    the mps2-an505 anyway, so it doesn't really matter.)



Applied to target-arm.next, thanks.

-- PMM



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