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Re: [Qemu-devel] [PATCH 0/3] aspeed/smc: small fixes


From: Cédric Le Goater
Subject: Re: [Qemu-devel] [PATCH 0/3] aspeed/smc: small fixes
Date: Wed, 20 Jun 2018 15:43:59 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2

On 06/20/2018 03:40 PM, Peter Maydell wrote:
> On 12 June 2018 at 07:57, Cédric Le Goater <address@hidden> wrote:
>> Hello,
>>
>> Here is a short series of cleanups and fixes for issues in the Aspeed
>> SMC controller model discovered when experimenting with the MMIO exec
>> feature and also from tests under a QEMU PowerNV machine.
>>
>> Indeed, the OPAL/skiboot firmware accesses the Aspeed SoC address
>> space using the iLPC->AHB bridge of the SuperIO controller and drives
>> the SPI controller to access the PNOR.
> 
> Is there anybody familiar with the aspeed SoC who'd like to
> review? The patches don't look particularly wrong, but I'm
> not really in a position to be able to review...

Adding Andrew and Joel as I should have.

Thanks,

C.




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