Re: [Qemu-devel] regression: sata cdrom boot broken

[Paolo Bonzini]

On 20/06/2018 13:07, Gerd Hoffmann wrote:
>   Hi,
> 
> $subject says all.  Noticed while testing the upcoming seabios update.
> Reproducer:
> 
>   qemu-system-x86_64 -M q35 -m 4G -cdrom 
> Fedora-Workstation-Live-x86_64-28-1.1.iso
> 
> bisected to:
> 
>   commit 956556e131e35f387ac482ad7b41151576fef057
>   Author: John Snow <address@hidden>
>   Date:   Wed Jun 6 15:09:50 2018 -0400
> 
>     ahci: move PIO Setup FIS before transfer, fix it for ATAPI commands
> 
> cheers,
>   Gerd
> 

If you know where to look at, the spec is actually pretty clear with
respect to when the interrupt is generated: "A PIO Setup FIS has been
received with the ‘I’ bit set, it has been copied into system memory,
and the data related to that FIS has been transferred".

However, after reading the SATA specification I believe that the PIO
Setup FIS should never generate an interrupt in SeaBIOS, because:

  If this is the first DRQ data block for this command, the Interrupt
  bit shall be cleared to zero. If this is not the first DRQ data block
  for this command, the Interrupt bit shall be set to one

Putting things together, there are two bugs in QEMU;

- the PIO Setup interrupt must be generated at the end of data transfer

- the PIO Setup interrupt must not be generated for the ATAPI command
transfer

*But* because SeaBIOS always uses DMA for ATAPI commands, there should
never be more than one DRQ data block for each command, and it should be
possible to remove the fishy PIO Setup FIS handling in SeaBIOS.

Paolo