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[Qemu-devel] [PATCH 22/35] target/mips: Fix data type for offset
From: |
Yongbok Kim |
Subject: |
[Qemu-devel] [PATCH 22/35] target/mips: Fix data type for offset |
Date: |
Wed, 20 Jun 2018 13:06:07 +0100 |
From: Yongbok Kim <address@hidden>
Offset can be larger than 16 bit from nanoMIPS,
and immediate field can be larger than 16 bits as well.
Signed-off-by: Yongbok Kim <address@hidden>
---
target/mips/translate.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 9e29dd7..8c20ba3 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -2114,7 +2114,7 @@ OP_ST_ATOMIC(scd,st64,ld64,0x7);
#undef OP_ST_ATOMIC
static void gen_base_offset_addr (DisasContext *ctx, TCGv addr,
- int base, int16_t offset)
+ int base, int offset)
{
if (base == 0) {
tcg_gen_movi_tl(addr, offset);
@@ -2142,7 +2142,7 @@ static target_ulong pc_relative_pc (DisasContext *ctx)
/* Load */
static void gen_ld(DisasContext *ctx, uint32_t opc,
- int rt, int base, int16_t offset)
+ int rt, int base, int offset)
{
TCGv t0, t1, t2;
int mem_idx = ctx->mem_idx;
@@ -2377,7 +2377,7 @@ static void gen_llwp(DisasContext *ctx, uint32_t base,
int16_t offset,
/* Store */
static void gen_st (DisasContext *ctx, uint32_t opc, int rt,
- int base, int16_t offset)
+ int base, int offset)
{
TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
@@ -2602,7 +2602,7 @@ static void gen_cop1_ldst(DisasContext *ctx, uint32_t op,
int rt,
/* Arithmetic with immediate operand */
static void gen_arith_imm(DisasContext *ctx, uint32_t opc,
- int rt, int rs, int16_t imm)
+ int rt, int rs, int imm)
{
target_ulong uimm = (target_long)imm; /* Sign extend to 32/64 bits */
--
1.9.1
- [Qemu-devel] [PATCH 16/35] target/mips: Add has_isa_mode, (continued)
- [Qemu-devel] [PATCH 16/35] target/mips: Add has_isa_mode, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 17/35] target/mips: Add nanoMIPS load store instructions, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 18/35] target/mips: Add nanoMIPS branch instructions, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 19/35] target/mips: Implement nanoMIPS LLWP/SCWP pair, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 20/35] target/mips: Fix not to update BadVAddr in Debug Mode, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 21/35] target/mips: Add nanoMIPS rotx instruction, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 22/35] target/mips: Fix data type for offset,
Yongbok Kim <=
- [Qemu-devel] [PATCH 23/35] target/mips: Update BadInstr{P} regs on nanoMIPS, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 24/35] target/mips: Add nanoMIPS CP0_BadInstrX register, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 25/35] target/mips: Config3.ISAOnExc is read only in nanoMIPS, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 26/35] target/mips: Fix nanoMIPS exception_resume_pc, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 27/35] target/mips: Fix nanoMIPS set_hflags_for_handler, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 28/35] target/mips: Fix nanoMIPS set_pc, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 29/35] target/mips: Fix ERET/ERETNC can cause ADEL exception, Yongbok Kim, 2018/06/20