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[Qemu-devel] [PULL 25/43] target/arm: Implement SVE copy to vector (pred
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 25/43] target/arm: Implement SVE copy to vector (predicated) |
Date: |
Fri, 15 Jun 2018 15:25:03 +0100 |
From: Richard Henderson <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate-sve.c | 19 +++++++++++++++++++
target/arm/sve.decode | 6 ++++++
2 files changed, 25 insertions(+)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index feb4c09f1b8..eed59524a9c 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -2624,6 +2624,25 @@ static bool trans_LASTB_r(DisasContext *s, arg_rpr_esz
*a, uint32_t insn)
return do_last_general(s, a, true);
}
+static bool trans_CPY_m_r(DisasContext *s, arg_rpr_esz *a, uint32_t insn)
+{
+ if (sve_access_check(s)) {
+ do_cpy_m(s, a->esz, a->rd, a->rd, a->pg, cpu_reg_sp(s, a->rn));
+ }
+ return true;
+}
+
+static bool trans_CPY_m_v(DisasContext *s, arg_rpr_esz *a, uint32_t insn)
+{
+ if (sve_access_check(s)) {
+ int ofs = vec_reg_offset(s, a->rn, 0, a->esz);
+ TCGv_i64 t = load_esz(cpu_env, ofs, a->esz);
+ do_cpy_m(s, a->esz, a->rd, a->rd, a->pg, t);
+ tcg_temp_free_i64(t);
+ }
+ return true;
+}
+
/*
*** SVE Memory - 32-bit Gather and Unsized Contiguous Group
*/
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index 1226867f698..519139f6844 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -450,6 +450,12 @@ LASTB_v 00000101 .. 10001 1 100 ... ..... .....
@rd_pg_rn
LASTA_r 00000101 .. 10000 0 101 ... ..... ..... @rd_pg_rn
LASTB_r 00000101 .. 10000 1 101 ... ..... ..... @rd_pg_rn
+# SVE copy element from SIMD&FP scalar register
+CPY_m_v 00000101 .. 100000 100 ... ..... ..... @rd_pg_rn
+
+# SVE copy element from general register to vector (predicated)
+CPY_m_r 00000101 .. 101000 101 ... ..... ..... @rd_pg_rn
+
### SVE Predicate Logical Operations Group
# SVE predicate logical operations
--
2.17.1
- [Qemu-devel] [PULL 23/43] target/arm: Implement SVE compress active elements, (continued)
- [Qemu-devel] [PULL 23/43] target/arm: Implement SVE compress active elements, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 06/43] hw/watchdog/wdt_i6300esb: Convert away from old_mmio, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 12/43] hw/core/or-irq: Support more than 16 inputs to an OR gate, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 01/43] arm_gicv3_kvm: kvm_dist_get/put_priority: skip the registers banked by GICR_IPRIORITYR, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 14/43] cputlb: Pass cpu_transaction_failed() the correct physaddr, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 21/43] target/arm: Implement SVE Permute - Predicates Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 18/43] exec.c: Use stn_p() and ldn_p() instead of explicit switches, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 19/43] target/arm: Extend vec_reg_offset to larger sizes, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 03/43] hw/sh/sh7750: Convert away from old_mmio, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 20/43] target/arm: Implement SVE Permute - Unpredicated Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 25/43] target/arm: Implement SVE copy to vector (predicated),
Peter Maydell <=
- [Qemu-devel] [PULL 24/43] target/arm: Implement SVE conditionally broadcast/extract element, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 02/43] hw/arm/mps2-tz: Put ethernet controller behind PPC, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 26/43] target/arm: Implement SVE reverse within elements, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 30/43] target/arm: Implement SVE Integer Compare - Immediate Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 33/43] target/arm: Implement SVE Integer Compare - Scalars Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 34/43] target/arm: Implement FDUP/DUP, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 31/43] target/arm: Implement SVE Partition Break Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 28/43] target/arm: Implement SVE Select Vectors Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 41/43] iommu: Add IOMMU index argument to translate method, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 42/43] exec.c: Handle IOMMUs in address_space_translate_for_iotlb(), Peter Maydell, 2018/06/15