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[Qemu-devel] [PATCH v5 13/28] fpu/softfloat: Partial support for ARM Alt
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v5 13/28] fpu/softfloat: Partial support for ARM Alternative half-precision |
Date: |
Mon, 14 May 2018 15:12:04 -0700 |
From: Alex Bennée <address@hidden>
For float16 ARM supports an alternative half-precision format which
sacrifices the ability to represent NaN/Inf in return for a higher
dynamic range. The new FloatFmt flag, arm_althp, is then used to
modify the behaviour of canonicalize and round_canonical with respect
to representation and exception raising.
Usage of this new flag waits until we re-factor float-to-float conversions.
Signed-off-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
v3
- squash NaN to 0 if destination is AHP F16
v4
- handle inf -> ahp max in float_to_float not round_canonical
- assert no nan and inf for ahp in round_canonical
- check ahp before snan in float_to_float
v5
- split out canonicalize and round_canonical changes from the rest
---
fpu/softfloat.c | 19 ++++++++++++++++---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 41253c6749..55d0d01ec3 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -220,8 +220,10 @@ typedef struct {
* frac_shift: shift to normalise the fraction with DECOMPOSED_BINARY_POINT
* The following are computed based the size of fraction
* frac_lsb: least significant bit of fraction
- * fram_lsbm1: the bit bellow the least significant bit (for rounding)
+ * frac_lsbm1: the bit bellow the least significant bit (for rounding)
* round_mask/roundeven_mask: masks used for rounding
+ * The following optional modifiers are available:
+ * arm_althp: handle ARM Alternative Half Precision
*/
typedef struct {
int exp_size;
@@ -233,6 +235,7 @@ typedef struct {
uint64_t frac_lsbm1;
uint64_t round_mask;
uint64_t roundeven_mask;
+ bool arm_althp;
} FloatFmt;
/* Expand fields based on the size of exponent and fraction */
@@ -324,7 +327,7 @@ static inline float64 float64_pack_raw(FloatParts p)
static FloatParts canonicalize(FloatParts part, const FloatFmt *parm,
float_status *status)
{
- if (part.exp == parm->exp_max) {
+ if (part.exp == parm->exp_max && !parm->arm_althp) {
if (part.frac == 0) {
part.cls = float_class_inf;
} else {
@@ -413,7 +416,15 @@ static FloatParts round_canonical(FloatParts p,
float_status *s,
}
frac >>= frac_shift;
- if (unlikely(exp >= exp_max)) {
+ if (parm->arm_althp) {
+ /* ARM Alt HP eschews Inf and NaN for a wider exponent. */
+ if (unlikely(exp > exp_max)) {
+ /* Overflow. Return the maximum normal. */
+ flags = float_flag_invalid;
+ exp = exp_max;
+ frac = -1;
+ }
+ } else if (unlikely(exp >= exp_max)) {
flags |= float_flag_overflow | float_flag_inexact;
if (overflow_norm) {
exp = exp_max - 1;
@@ -464,12 +475,14 @@ static FloatParts round_canonical(FloatParts p,
float_status *s,
case float_class_inf:
do_inf:
+ assert(!parm->arm_althp);
exp = exp_max;
frac = 0;
break;
case float_class_qnan:
case float_class_snan:
+ assert(!parm->arm_althp);
exp = exp_max;
frac >>= parm->frac_shift;
break;
--
2.17.0
- [Qemu-devel] [PATCH v5 08/28] fpu/softfloat: Replace float_class_msnan with parts_silence_nan, (continued)
- [Qemu-devel] [PATCH v5 08/28] fpu/softfloat: Replace float_class_msnan with parts_silence_nan, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 07/28] fpu/softfloat: Replace float_class_dnan with parts_default_nan, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 11/28] target/arm: squash FZ16 behaviour for conversions, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 12/28] target/arm: Remove floatX_maybe_silence_nan from conversions, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 10/28] target/arm: convert conversion helpers to fpst/ahp_flag, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 13/28] fpu/softfloat: Partial support for ARM Alternative half-precision,
Richard Henderson <=
- [Qemu-devel] [PATCH v5 16/28] target/m68k: Use floatX_silence_nan when we have already checked for SNaN, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 15/28] target/hppa: Remove floatX_maybe_silence_nan from conversions, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 14/28] fpu/softfloat: re-factor float to float conversions, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 17/28] target/mips: Remove floatX_maybe_silence_nan from conversions, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 18/28] target/riscv: Remove floatX_maybe_silence_nan from conversions, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 19/28] target/s390x: Remove floatX_maybe_silence_nan from conversions, Richard Henderson, 2018/05/14
- [Qemu-devel] [PATCH v5 20/28] fpu/softfloat: Use float*_silence_nan in propagateFloat*NaN, Richard Henderson, 2018/05/14