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Re: [Qemu-devel] [PATCH v2 2/3] fpu/softfloat: support ARM Alternative h
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] [PATCH v2 2/3] fpu/softfloat: support ARM Alternative half-precision |
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Date: |
Fri, 4 May 2018 08:36:20 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 |
On 05/04/2018 05:26 AM, Alex Bennée wrote:
>
> Richard Henderson <address@hidden> writes:
>
>> On 05/03/2018 11:17 AM, Peter Maydell wrote:
>>> (target/i386 notably does not do this, we should check how
>>> SSE and x87 handle NaNs in fp conversions first.)
>>
>> Hardware does silence NaNs. I tested that earlier:
>>
>> https://lists.gnu.org/archive/html/qemu-devel/2018-04/msg03114.html
>
> Does that include SSE?
Yes.
> I know the hardware will silence NaN's if the
> value is ever pushed into an x87 register (as GCC will do when
> spilling/filling float).
Actually, loads and stores are purely bit operations that do not modify data.
r~
[Qemu-devel] [PATCH v2 3/3] tests/tcg/aarch64: add fcvt test cases for AArch64 (!UPSTREAM), Alex Bennée, 2018/05/02
Re: [Qemu-devel] [PATCH v2 0/3] refactor float-to-float conversions and fix AHP, Richard Henderson, 2018/05/02
Re: [Qemu-devel] [PATCH v2 0/3] refactor float-to-float conversions and fix AHP, no-reply, 2018/05/02