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Re: [Qemu-devel] [PATCH 08/10] intel-iommu: maintain per-device iova ran


From: Jason Wang
Subject: Re: [Qemu-devel] [PATCH 08/10] intel-iommu: maintain per-device iova ranges
Date: Thu, 3 May 2018 17:22:03 +0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0



On 2018年05月03日 15:53, Peter Xu wrote:
On Thu, May 03, 2018 at 03:43:35PM +0800, Jason Wang wrote:

On 2018年05月03日 15:28, Peter Xu wrote:
On Thu, May 03, 2018 at 03:20:11PM +0800, Jason Wang wrote:
On 2018年05月03日 14:04, Peter Xu wrote:
IMHO the guest can't really detect this, but it'll found that the
device is not working functionally if it's doing something like what
Jason has mentioned.

Actually now I have had an idea if we really want to live well even
with Jason's example: maybe we'll need to identify PSI/DSI.  For DSI,
we don't remap for mapped pages; for PSI, we unmap and remap the
mapped pages.  That'll complicate the stuff a bit, but it should
satisfy all the people.

Thanks,
So it looks like there will be still unnecessary unamps.
Could I ask what do you mean by "unecessary unmaps"?
It's for "for PSI, we unmap and remap the mapped pages". So for the first
"unmap" how do you know it was really necessary without knowing the state of
current shadow page table?
I don't.  Could I just unmap it anyway?  Say, now the guest _modified_
the PTE already.  Yes I think it's following the spec, but it is
really _unsafe_.  We can know that from what it has done already.
Then I really think a unmap+map would be good enough for us...  After
all that behavior can cause DMA error even on real hardwares.  It can
never tell.

I mean for following case:

1) guest maps A1 (iova) to XXX
2) guest maps A2 (A1 + 4K) (iova) to YYY
3) guest maps A3 (A1 + 8K) (iova) to ZZZ
4) guest unmaps A2 and A2, for reducing the number of PSIs, it can invalidate A1 with a range of 2M

If this is allowed by spec, looks like A1 will be unmaped and mapped.

Thanks


How about record the mappings in the tree too?
As I mentioned, for L1 guest (e.g., DPDK applications running in L1)
it'll be fine.  But I'm just afraid we will have other use cases, like
the L2 guests. That might need tons of the mapping entries in the
worst case scenario.

Yes, but that's the price of shadow page tables.
So that's why I would like to propose this mergable interval tree.  It
might greatly reduce the price if we can reach a consensus on how we
should treat those strange-behaved guest OSs.  Thanks,





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