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[Qemu-devel] [PATCH 4/9] target/arm: Clear SVE high bits for FMOV
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 4/9] target/arm: Clear SVE high bits for FMOV |
Date: |
Tue, 24 Apr 2018 15:22:55 -1000 |
Use write_fp_dreg and clear_vec_high to zero the bits
that need zeroing for these cases.
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate-a64.c | 17 +++++------------
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index b27892d971..f2241d8174 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -5356,31 +5356,24 @@ static void handle_fmov(DisasContext *s, int rd, int
rn, int type, bool itof)
if (itof) {
TCGv_i64 tcg_rn = cpu_reg(s, rn);
+ TCGv_i64 tmp;
switch (type) {
case 0:
- {
/* 32 bit */
- TCGv_i64 tmp = tcg_temp_new_i64();
+ tmp = tcg_temp_new_i64();
tcg_gen_ext32u_i64(tmp, tcg_rn);
- tcg_gen_st_i64(tmp, cpu_env, fp_reg_offset(s, rd, MO_64));
- tcg_gen_movi_i64(tmp, 0);
- tcg_gen_st_i64(tmp, cpu_env, fp_reg_hi_offset(s, rd));
+ write_fp_dreg(s, rd, tmp);
tcg_temp_free_i64(tmp);
break;
- }
case 1:
- {
/* 64 bit */
- TCGv_i64 tmp = tcg_const_i64(0);
- tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_offset(s, rd, MO_64));
- tcg_gen_st_i64(tmp, cpu_env, fp_reg_hi_offset(s, rd));
- tcg_temp_free_i64(tmp);
+ write_fp_dreg(s, rd, tcg_rn);
break;
- }
case 2:
/* 64 bit to top half. */
tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_hi_offset(s, rd));
+ clear_vec_high(s, true, rd);
break;
}
} else {
--
2.14.3
- [Qemu-devel] [PATCH 0/9] target/arm: Fixups for ARM_FEATURE_V8_FP16, Richard Henderson, 2018/04/24
- [Qemu-devel] [PATCH 5/9] target/arm: Implement FMOV (general) for fp16, Richard Henderson, 2018/04/24
- [Qemu-devel] [PATCH 7/9] target/arm: Implement FCVT (scalar, fixed-point) for fp16, Richard Henderson, 2018/04/24
- [Qemu-devel] [PATCH 8/9] target/arm: Implement FP data-processing (2 source) for fp16, Richard Henderson, 2018/04/24
- [Qemu-devel] [PATCH 6/9] target/arm: Implement FCVT (scalar, integer) for fp16, Richard Henderson, 2018/04/24