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[Qemu-devel] [PULL 03/13] char: i.MX: Simplify imx_update()
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 03/13] char: i.MX: Simplify imx_update() |
Date: |
Mon, 19 Mar 2018 18:34:05 +0000 |
From: Andrey Smirnov <address@hidden>
Code of imx_update() is slightly confusing since the "flags" variable
doesn't really corespond to anything in real hardware and server as a
kitchensink accumulating events normally reported via USR1 and USR2
registers.
Change the code to explicitly evaluate state of interrupts reported
via USR1 and USR2 against corresponding masking bits and use the to
detemine if IRQ line should be asserted or not.
NOTE: Check for UTS1_TXEMPTY being set has been dropped for two
reasons:
1. Emulation code implements a single character FIFO, so this flag
will always be set since characters are trasmitted as a part of
the code emulating "push" into the FIFO
2. imx_update() is really just a function doing ORing and maksing
of reported events, so checking for UTS1_TXEMPTY should happen,
if it's ever really needed should probably happen outside of
it.
Cc: address@hidden
Cc: address@hidden
Cc: Bill Paul <address@hidden>
Cc: Peter Maydell <address@hidden>
Signed-off-by: Andrey Smirnov <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/char/imx_serial.c | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c
index 70405ccf8b..d1e8586280 100644
--- a/hw/char/imx_serial.c
+++ b/hw/char/imx_serial.c
@@ -56,16 +56,24 @@ static const VMStateDescription vmstate_imx_serial = {
static void imx_update(IMXSerialState *s)
{
- uint32_t flags;
+ uint32_t usr1;
+ uint32_t usr2;
+ uint32_t mask;
- flags = (s->usr1 & s->ucr1) & (USR1_TRDY|USR1_RRDY);
- if (s->ucr1 & UCR1_TXMPTYEN) {
- flags |= (s->uts1 & UTS1_TXEMPTY);
- } else {
- flags &= ~USR1_TRDY;
- }
+ /*
+ * Lucky for us TRDY and RRDY has the same offset in both USR1 and
+ * UCR1, so we can get away with something as simple as the
+ * following:
+ */
+ usr1 = s->usr1 & s->ucr1 & (USR1_TRDY | USR1_RRDY);
+ /*
+ * Bits that we want in USR2 are not as conveniently laid out,
+ * unfortunately.
+ */
+ mask = (s->ucr1 & UCR1_TXMPTYEN) ? USR2_TXFE : 0;
+ usr2 = s->usr2 & mask;
- qemu_set_irq(s->irq, !!flags);
+ qemu_set_irq(s->irq, usr1 || usr2);
}
static void imx_serial_reset(IMXSerialState *s)
--
2.16.2
- [Qemu-devel] [PULL 00/13] target-arm queue, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 01/13] fsl-imx6: Swap Ethernet interrupt defines, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 02/13] dump: Update correct kdump phys_base field for AArch64, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 03/13] char: i.MX: Simplify imx_update(),
Peter Maydell <=
- [Qemu-devel] [PULL 05/13] hw/arm/raspi: Don't do board-setup or secure-boot for raspi3, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 04/13] char: i.MX: Add support for "TX complete" interrupt, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 06/13] hw/arm/boot: assert that secure_boot and secure_board_setup are false for AArch64, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 07/13] hw/arm/boot: If booting a kernel in EL2, set SCR_EL3.HCE, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 08/13] hw/arm/bcm2386: Fix parent type of bcm2386, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 09/13] hw/arm/bcm2836: Rename bcm2836 type/struct to bcm283x, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 10/13] hw/arm/bcm2836: Create proper bcm2837 device, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 11/13] hw/arm/bcm2836: Use correct affinity values for BCM2837, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 12/13] hw/arm/bcm2836: Hardcode correct CPU type, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 13/13] hw/arm/raspi: Provide spin-loop code for AArch64 CPUs, Peter Maydell, 2018/03/19