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Re: [Qemu-devel] [PATCH v8 19/23] SiFive RISC-V UART Device


From: Bastian Koppelmann
Subject: Re: [Qemu-devel] [PATCH v8 19/23] SiFive RISC-V UART Device
Date: Fri, 16 Mar 2018 21:46:34 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0

On 03/16/2018 07:36 PM, Michael Clark wrote:
> On Fri, Mar 16, 2018 at 11:30 AM, Michael Clark <address@hidden> wrote:
> 
>>
>>
>> On Sun, Mar 11, 2018 at 4:43 AM, Bastian Koppelmann <
>> address@hidden> wrote:
>>
>>> Hi Mark,
>>>
>>> On 03/10/2018 10:40 AM, Mark Cave-Ayland wrote:
>>>> On 10/03/18 03:02, Michael Clark wrote:
>>>>
>>>>> On Sat, Mar 10, 2018 at 1:39 AM, Philippe Mathieu-Daudé <
>>> address@hidden>
>>>>> wrote:
>>>>>
>>> [...]
>>>> Another general note: for each of the main QEMU platforms supported
>>>> there is a home page on the official wiki, so do make sure that you set
>>>> yourself a template for RiscV and add some information to help people
>>>> get started.
>>>>
>>> Thanks for the pointer. I went ahead and created a basic page for RISC-V
>>> with instructions on how to build QEMU and boot Fedora.
>>>
>>
>> Thanks Bastian! I'll add a link back to the official QEMU RISC-V
>> Architecture page from the riscv-qemu repo wiki...
>>
> 
> I noticed there is a spelling mistake in the description: "implented"
> instead of "implemented"

Woops, fixed :).

Cheers,
Bastian



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