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[Qemu-devel] [PULL 23/25] sdcard: Add the Tuning Command (CMD19)
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 23/25] sdcard: Add the Tuning Command (CMD19) |
Date: |
Fri, 9 Mar 2018 17:26:20 +0000 |
From: Philippe Mathieu-Daudé <address@hidden>
>From the "Physical Layer Simplified Specification Version 3.01":
A known data block ("Tuning block") can be used to tune sampling
point for tuning required hosts. [...]
This procedure gives the system optimal timing for each specific
host and card combination and compensates for static delays in
the timing budget including process, voltage and different PCB
loads and skews. [...]
Data block, carried by DAT[3:0], contains a pattern for tuning
sampling position to receive data on the CMD and DAT[3:0] line.
[based on a patch from Alistair Francis <address@hidden>
from qemu/xilinx tag xilinx-v2015.2]
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/sd/sd.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index dc50d6bbf7..235e0518d6 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1169,6 +1169,14 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
SDRequest req)
}
break;
+ case 19: /* CMD19: SEND_TUNING_BLOCK (SD) */
+ if (sd->state == sd_transfer_state) {
+ sd->state = sd_sendingdata_state;
+ sd->data_offset = 0;
+ return sd_r1;
+ }
+ break;
+
case 23: /* CMD23: SET_BLOCK_COUNT */
switch (sd->state) {
case sd_transfer_state:
@@ -1893,6 +1901,20 @@ void sd_write_data(SDState *sd, uint8_t value)
}
}
+#define SD_TUNING_BLOCK_SIZE 64
+
+static const uint8_t sd_tuning_block_pattern[SD_TUNING_BLOCK_SIZE] = {
+ /* See: Physical Layer Simplified Specification Version 3.01, Table 4-2 */
+ 0xff, 0x0f, 0xff, 0x00, 0x0f, 0xfc, 0xc3, 0xcc,
+ 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
+ 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
+ 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
+ 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
+ 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
+ 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
+ 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
+};
+
uint8_t sd_read_data(SDState *sd)
{
/* TODO: Append CRCs */
@@ -1972,6 +1994,13 @@ uint8_t sd_read_data(SDState *sd)
}
break;
+ case 19: /* CMD19: SEND_TUNING_BLOCK (SD) */
+ if (sd->data_offset >= SD_TUNING_BLOCK_SIZE - 1) {
+ sd->state = sd_transfer_state;
+ }
+ ret = sd_tuning_block_pattern[sd->data_offset++];
+ break;
+
case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */
ret = sd->data[sd->data_offset ++];
--
2.16.2
- [Qemu-devel] [PULL 01/25] target/arm: Add a core count property, (continued)
- [Qemu-devel] [PULL 01/25] target/arm: Add a core count property, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 14/25] target/arm: Query host CPU features on-demand at instance init, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 05/25] Implement support for i.MX7 Sabre board, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 18/25] hw/arm/virt: Add "max" to the list of CPU types "virt" supports, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 03/25] pci: Add support for Designware IP block, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 17/25] target/arm: Make 'any' CPU just an alias for 'max', Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 20/25] sdcard: Do not trace CMD55, except when we already expect an ACMD, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 24/25] sdhci: Fix a typo in comment, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 25/25] MAINTAINERS: Add entries for SD (SDHCI, SDBus, SDCard), Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 04/25] i.MX: Add i.MX7 SOC implementation., Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 23/25] sdcard: Add the Tuning Command (CMD19),
Peter Maydell <=
- Re: [Qemu-devel] [PULL 00/25] target-arm queue, Peter Maydell, 2018/03/12