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Re: [Qemu-devel] [patches] Re: [PULL] RISC-V QEMU Port Submission v8.2


From: Michael Clark
Subject: Re: [Qemu-devel] [patches] Re: [PULL] RISC-V QEMU Port Submission v8.2
Date: Fri, 9 Mar 2018 08:53:50 +1300

On Fri, Mar 9, 2018 at 8:29 AM, Palmer Dabbelt <address@hidden> wrote:

> On Thu, 08 Mar 2018 03:41:33 PST (-0800), Michael Clark wrote:
>
>> On Fri, 9 Mar 2018 at 12:18 AM, Michael Clark <address@hidden> wrote:
>>
>>> On Fri, 9 Mar 2018 at 12:10 AM, Michael Clark <address@hidden> wrote:
>>>
>>>> On Thu, 8 Mar 2018 at 11:02 PM, Peter Maydell <address@hidden
>>>> >
>>>> wrote:
>>>>
>>>>> On 6 March 2018 at 19:46, Michael Clark <address@hidden> wrote:
>>>>>
>>>> You are making this very hard. Do you work for Arm perchance? I really
>>> wouldn’t be surprised if our port is being sandbagged by Arm. Apologies
>>> for
>>> being so direct about this, but things like this happen...
>>>
>>> I have complied with practically every review request and the sign-offs
>>> are there. It’s a bit ridiculous.
>>>
>>> It would be nice to find someone neutral, unrelated to Arm, to merge our
>>> PR
>>>
>>>
>> Some history on the origins of RISC to put things in perspective:
>>
>> https://en.m.wikipedia.org/wiki/Berkeley_RISC
>>
>> David Patterson worked with Andrew Waterman and Krste Asanovic on the
>> design of RISC-V. Sagar did most of the work on the QEMU port and he
>> agreeded to sign off on all patches. The SiFive patches only have
>> sign-offs
>> from SiFive because SiFive was the sole contributor for its hardware
>> model,
>> beside the SiFiveUART which has Stefan’s sign-off.
>>
>> In any case it seems there is not enough review bandwidth in the QEMU
>> project as a whole and the policy to accept contributions is too strict to
>> be reasonable, given earnest attempts to comply with *all* review
>> feedback.
>> Not impressed.
>>
>
> On behalf of the rest of the RISC-V QEMU team I'd like to apologize for
> Michael's comments.  That's a pretty insulting thing to say, and the whole
> thing comes off as a bit entitled: we've asked the QEMU community to do a
> lot of work for us in reviewing our port, and seeing as how none of us are
> QEMU contributors we certainly don't have any grounds to ask someone to
> stop reviewing it -- that's pretty absurd.
>
> While I haven't been following the upstreaming process as closely as I
> should have been, as far as I can tell there's no grounds to accuse Peter,
> or anyone else, of trying to shoot down our port for any reason.  Peter, I
> can understand if you're upset, as I certainly would be.  If you don't want
> to help out with our port any more then I can understand, but I'd just like
> to assure you that we value the time you've spent on our port and hope you
> continue to help out!
>
> Hopefully this doesn't derail our chances of moving forward with
> submitting the RISC-V port upstream.
>
> Sorry!
>

I re-iterate Palmer's apology.

I shouldn't be polling git.qemu.org/qemu.git and answering emails near
to 3am in the morning after 4 months of working on trying to get the RISC-V
port in shape to go upstream.

It appears it is completely my mistake and I had tagged early deltas on top
of v8.2 instead of the tip of v8.2.

I've force pushed the 'riscv-qemu-upstream-v8.2' so only the mailing list
will hold the history of my mistake.

$ git push -f --tags
Counting objects: 1, done.
Writing objects: 100% (1/1), 6.31 KiB | 0 bytes/s, done.
Total 1 (delta 0), reused 0 (delta 0)
To address@hidden:riscv/riscv-qemu.git
 + feb8f5e...2c7f042 riscv-qemu-upstream-v8.2 -> riscv-qemu-upstream-v8.2
(forced update)


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