Re: [Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definitions from

[Michael Clark]

On Wed, Mar 7, 2018 at 5:14 PM, Michael Clark <address@hidden> wrote:

>
>
> On Wed, Mar 7, 2018 at 12:27 PM, Philippe Mathieu-Daudé <address@hidden>
> wrote:
>
>>
>> Ok until here.
>>
>> > diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
>> > index 0aebc57..818fbdc 100644
>> > --- a/include/hw/riscv/sifive_e.h
>> > +++ b/include/hw/riscv/sifive_e.h
>> > @@ -19,16 +19,7 @@
>> >  #ifndef HW_SIFIVE_E_H
>> >  #define HW_SIFIVE_E_H
>> >
>> > -#define TYPE_SIFIVE_E "riscv.sifive_e"
>> > -
>> > -#define SIFIVE_E(obj) \
>> > -    OBJECT_CHECK(SiFiveEState, (obj), TYPE_SIFIVE_E)
>> > -
>> >  typedef struct SiFiveEState {
>> > -    /*< private >*/
>> > -    SysBusDevice parent_obj;
>>
>> I'd keep however a 'Object parent_obj' here, to stay QOM; but your patch
>> is valid.
>>
>
> Okay I'll keep parent_obj when I respin.
>

BTW is the string constant in DEFINE_MACHINE a QOM type?

i.e. should I keep the type conversion and type name macros and use the
type name macro in DEFINE_MACHINE?