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Re: [Qemu-devel] [PATCH v5 06/23] Softfloat support for IEEE 754-201x mi
From: |
Michael Clark |
Subject: |
Re: [Qemu-devel] [PATCH v5 06/23] Softfloat support for IEEE 754-201x minimumNumber/maximumNumber |
Date: |
Fri, 9 Feb 2018 10:03:31 +1300 |
On Fri, Feb 9, 2018 at 3:35 AM, Richard Henderson <
address@hidden> wrote:
> On 02/07/2018 05:28 PM, Michael Clark wrote:
> > QEMU currently implements IEEE 754-2008 minNum/maxNum. This patch adds
> > support for IEEE 754-201x minimumNumber/maximumNumber which is required
> > by the RISC-V port.
> >
> > minNum(x, y) is defined as
> > - min(x, y) if neither is NaN
> > - if one of x and y is a number and one is qNaN, return the number
> > - if both are qNaN, or either is sNaN, return NaN
> >
> > minimumNumber(x, y) is defined as
> > - min(x, y) if neither is NaN
> > - if one of x and y is a number and one is qNaN or sNaN, return the
> number
> > - if both are NaN, return the number
> >
> > Both functions signal the invalid exception on sNaN inputs.
> >
> > Signed-off-by: Michael Clark <address@hidden>
> > ---
>
> Thanks for the description of the function. We've got a reorg of softfloat
> pending at the moment; I'd want to defer this patch until that set has
> landed.
>
Noted.
We should also add a mention of minimumNumber/maximumNumber to the
preceeding comment, which isn't in the current version of the patch. e.g.
* minimumnumber() and maximumnumber() functions correspond to
minimumNumber()
* and maximumNumber() from the IEEE-754 201x specification.
- [Qemu-devel] [PATCH v5 00/23] RISC-V QEMU Port Submission, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 01/23] RISC-V Maintainers, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 02/23] RISC-V ELF Machine Definition, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 03/23] RISC-V CPU Core Definition, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 06/23] Softfloat support for IEEE 754-201x minimumNumber/maximumNumber, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 05/23] RISC-V CPU Helpers, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 07/23] RISC-V FPU Support, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 08/23] RISC-V GDB Stub, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 04/23] RISC-V Disassembler, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 10/23] RISC-V Physical Memory Protection, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 11/23] RISC-V Linux User Emulation, Michael Clark, 2018/02/07
- [Qemu-devel] [PATCH v5 09/23] RISC-V TCG Code Generation, Michael Clark, 2018/02/07