Re: [Qemu-devel] [PATCH v1 11/21] RISC-V HTIF Console

[Christoph Hellwig]

On Mon, Feb 05, 2018 at 09:19:46AM +1300, Michael Clark wrote:
> BTW I've created branches in my own personal trees for Privileged ISA
> v1.9.1. These trees are what I use for v1.9.1 backward compatibility
> testing in QEMU:
> 
> - https://github.com/michaeljclark/riscv-linux/tree/riscv-linux-4.6.2
> - https://github.com/michaeljclark/riscv-pk/tree/bbl-1.9.1

What MMU-enabled chips that implement 1.9.1 are out there?  If there
is enough we should support this with a compile time option in the
Linux kernel as well.

> We need to be a little more disciplined with software releases, especially
> when there are backward incompatible changes in the specification. The
> repos need to be branched and tagged. It should be possible to somehow
> derive the conformance level. Perhaps the SBI should have an API for this.
> This is one of the driving reasons behind adding version conformance levels
> to QEMU. Previously we had repos in a state of flux and if you didn't have
> the magic commit ids you were out of luck. For example, when we have
> priv isa v1.11 released, we will still need a priv isa v1.10 mode which
> masks out all of the new features. Given there are no "feature bits"
> besides the extensions "IMAFDSU", all we have to go on presently is the
> privileged ISA spec version number.

As far as I can tell privileged ISA changes post 1.10 should be backwards
compatible and only implemement detectable optional CSRs and instructions.

That being said I started a thread on that on the privileged spec list
where I need to follow up on Andrews mail once I get back to my work
mail after a little vacation.