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[Qemu-devel] [PATCH v9 11/26] tcg: Loosen vec_gen_op* typecheck rules
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v9 11/26] tcg: Loosen vec_gen_op* typecheck rules |
Date: |
Mon, 15 Jan 2018 19:33:49 -0800 |
For ARM SVE with VQ=3, we want to be able to dup a scalar
into a v256, use that, and then perform a second operation
with the v256 punned to a v128.
Allow operands to a vector operation be wider than necessary
for the output.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/tcg-op-vec.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index a73d094ddb..ad9a45b653 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -78,7 +78,7 @@ static void vec_gen_op2(TCGOpcode opc, unsigned vece,
TCGv_vec r, TCGv_vec a)
TCGTemp *at = tcgv_vec_temp(a);
TCGType type = rt->base_type;
- tcg_debug_assert(at->base_type == type);
+ tcg_debug_assert(at->base_type >= type);
vec_gen_2(opc, type, vece, temp_arg(rt), temp_arg(at));
}
@@ -90,8 +90,8 @@ static void vec_gen_op3(TCGOpcode opc, unsigned vece,
TCGTemp *bt = tcgv_vec_temp(b);
TCGType type = rt->base_type;
- tcg_debug_assert(at->base_type == type);
- tcg_debug_assert(bt->base_type == type);
+ tcg_debug_assert(at->base_type >= type);
+ tcg_debug_assert(bt->base_type >= type);
vec_gen_3(opc, type, vece, temp_arg(rt), temp_arg(at), temp_arg(bt));
}
@@ -257,14 +257,14 @@ void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec r,
TCGv_i64 a)
if (TCG_TARGET_REG_BITS == 64) {
TCGArg ai = tcgv_i64_arg(a);
- vec_gen_2(INDEX_op_dup_vec, type, MO_64, ri, ai);
+ vec_gen_2(INDEX_op_dup_vec, type, vece, ri, ai);
} else if (vece == MO_64) {
TCGArg al = tcgv_i32_arg(TCGV_LOW(a));
TCGArg ah = tcgv_i32_arg(TCGV_HIGH(a));
vec_gen_3(INDEX_op_dup2_vec, type, MO_64, ri, al, ah);
} else {
TCGArg ai = tcgv_i32_arg(TCGV_LOW(a));
- vec_gen_2(INDEX_op_dup_vec, type, MO_64, ri, ai);
+ vec_gen_2(INDEX_op_dup_vec, type, vece, ri, ai);
}
}
@@ -493,8 +493,8 @@ void tcg_gen_cmp_vec(TCGCond cond, unsigned vece,
TCGType type = rt->base_type;
int can;
- tcg_debug_assert(at->base_type == type);
- tcg_debug_assert(bt->base_type == type);
+ tcg_debug_assert(at->base_type >= type);
+ tcg_debug_assert(bt->base_type >= type);
can = tcg_can_emit_vec_op(INDEX_op_cmp_vec, type, vece);
if (can > 0) {
vec_gen_4(INDEX_op_cmp_vec, type, vece, ri, ai, bi, cond);
@@ -515,8 +515,8 @@ void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a,
TCGv_vec b)
TCGType type = rt->base_type;
int can;
- tcg_debug_assert(at->base_type == type);
- tcg_debug_assert(bt->base_type == type);
+ tcg_debug_assert(at->base_type >= type);
+ tcg_debug_assert(bt->base_type >= type);
can = tcg_can_emit_vec_op(INDEX_op_mul_vec, type, vece);
if (can > 0) {
vec_gen_3(INDEX_op_mul_vec, type, vece, ri, ai, bi);
--
2.14.3
- [Qemu-devel] [PATCH v9 01/26] tcg: Allow multiple word entries into the constant pool, (continued)
- [Qemu-devel] [PATCH v9 01/26] tcg: Allow multiple word entries into the constant pool, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 03/26] tcg: Standardize integral arguments to expanders, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 02/26] tcg: Add types and basic operations for host vectors, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 05/26] tcg: Add generic vector ops for interleave, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 04/26] tcg: Add generic vector expanders, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 06/26] tcg: Add generic vector ops for constant shifts, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 08/26] tcg: Add generic vector ops for multiplication, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 09/26] tcg: Add generic vector ops for extension, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 07/26] tcg: Add generic vector ops for comparisons, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 10/26] tcg: Add generic helpers for saturating arithmetic, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 11/26] tcg: Loosen vec_gen_op* typecheck rules,
Richard Henderson <=
- [Qemu-devel] [PATCH v9 13/26] tcg: Add generic vector helpers with a scalar variable operand, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 12/26] tcg: Add generic vector helpers with a scalar immediate operand, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 14/26] tcg/optimize: Handle vector opcodes during optimize, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 15/26] target/arm: Align vector registers, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 16/26] target/arm: Use vector infrastructure for aa64 add/sub/logic, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 17/26] target/arm: Use vector infrastructure for aa64 mov/not/neg, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 18/26] target/arm: Use vector infrastructure for aa64 dup/movi, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 19/26] target/arm: Use vector infrastructure for aa64 zip/uzp/trn/xtn, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 21/26] target/arm: Use vector infrastructure for aa64 compares, Richard Henderson, 2018/01/15
- [Qemu-devel] [PATCH v9 20/26] target/arm: Use vector infrastructure for aa64 constant shifts, Richard Henderson, 2018/01/15