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[Qemu-devel] [PATCH v7 04/26] target/arm: Align vector registers
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v7 04/26] target/arm: Align vector registers |
Date: |
Mon, 18 Dec 2017 09:17:36 -0800 |
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 96316700dd..3ff4dea6b8 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -492,7 +492,7 @@ typedef struct CPUARMState {
* the two execution states, and means we do not need to explicitly
* map these registers when changing states.
*/
- float64 regs[64];
+ float64 regs[64] QEMU_ALIGNED(16);
uint32_t xregs[16];
/* We store these fpcsr fields separately for convenience. */
--
2.14.3
- [Qemu-devel] [PATCH v7 00/26] tcg: generic vector operations, Richard Henderson, 2017/12/18
- [Qemu-devel] [PATCH v7 05/26] target/arm: Use vector infrastructure for aa64 add/sub/logic, Richard Henderson, 2017/12/18
- [Qemu-devel] [PATCH v7 04/26] target/arm: Align vector registers,
Richard Henderson <=
- [Qemu-devel] [PATCH v7 03/26] tcg: Allow multiple word entries into the constant pool, Richard Henderson, 2017/12/18
- [Qemu-devel] [PATCH v7 06/26] target/arm: Use vector infrastructure for aa64 mov/not/neg, Richard Henderson, 2017/12/18
- [Qemu-devel] [PATCH v7 07/26] target/arm: Use vector infrastructure for aa64 dup/movi, Richard Henderson, 2017/12/18
- [Qemu-devel] [PATCH v7 09/26] tcg: Add tcg_expand_vec_op and tcg-target.opc.h, Richard Henderson, 2017/12/18
- [Qemu-devel] [PATCH v7 01/26] tcg: Add types and basic operations for host vectors, Richard Henderson, 2017/12/18
- [Qemu-devel] [PATCH v7 11/26] target/arm: Use vector infrastructure for aa64 zip/uzp/trn/xtn, Richard Henderson, 2017/12/18
- [Qemu-devel] [PATCH v7 08/26] tcg/i386: Add vector operations, Richard Henderson, 2017/12/18