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[Qemu-devel] [PULL 41/43] xilinx_spips: Update the QSPI Mod ID reset val
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 41/43] xilinx_spips: Update the QSPI Mod ID reset value |
Date: |
Wed, 13 Dec 2017 18:12:39 +0000 |
From: Alistair Francis <address@hidden>
Update the reset value to match the latest ZynqMP register spec.
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: KONRAD Frederic <address@hidden>
Reviewed-by: Francisco Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/ssi/xilinx_spips.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index ad1b2ba..899db81 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -355,6 +355,7 @@ static void xlnx_zynqmp_qspips_reset(DeviceState *d)
s->regs[R_GQSPI_RX_THRESH] = 1;
s->regs[R_GQSPI_GFIFO_THRESH] = 1;
s->regs[R_GQSPI_IMR] = GQSPI_IXR_MASK;
+ s->regs[R_MOD_ID] = 0x01090101;
s->man_start_com_g = false;
s->gqspi_irqline = 0;
xlnx_zynqmp_qspips_update_ixr(s);
--
2.7.4
- [Qemu-devel] [PULL 24/43] target/arm: Implement TT instruction, (continued)
- [Qemu-devel] [PULL 24/43] target/arm: Implement TT instruction, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 31/43] target/arm: Convert get_phys_addr_pmsav7() to not return FSC values, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 26/43] target/arm: Remove fsr argument from arm_ld*_ptw(), Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 16/43] linux-headers: update to 4.15-rc1, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 34/43] target/arm: Ignore fsr from get_phys_addr() in do_ats_write(), Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 32/43] target/arm: Convert get_phys_addr_pmsav8() to not return FSC values, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 35/43] target/arm: Remove fsr argument from get_phys_addr() and arm_tlb_fill(), Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 19/43] target/arm: Allow explicit writes to CONTROL.SPSEL in Handler mode, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 37/43] nvic: Make nvic_sysreg_ns_ops work with any MemoryRegion, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 40/43] MAINTAINERS: replace the unavailable email address, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 41/43] xilinx_spips: Update the QSPI Mod ID reset value,
Peter Maydell <=
- [Qemu-devel] [PULL 42/43] xilinx_spips: Set all of the reset values, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 33/43] target/arm: Use ARMMMUFaultInfo in deliver_fault(), Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 36/43] target/arm: Extend PAR format determination, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 39/43] hw/display/tc6393xb: limit irq handler index to TC6393XB_GPIOS, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 38/43] nvic: Make systick banked, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 43/43] xilinx_spips: Use memset instead of a for loop to zero registers, Peter Maydell, 2017/12/13
- Re: [Qemu-devel] [PULL 00/43] target-arm queue, Peter Maydell, 2017/12/14