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[Qemu-devel] [PATCH v2 4/5] softfloat: add floatx80_getman(), floatx80_g
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH v2 4/5] softfloat: add floatx80_getman(), floatx80_getexp(), floatx80_scale() |
Date: |
Thu, 23 Nov 2017 17:35:37 +0100 |
copied from previous:
Written by Andreas Grabher for Previous, NeXT Computer Emulator.
Signed-off-by: Laurent Vivier <address@hidden>
---
fpu/softfloat-specialize.h | 15 ++++++
fpu/softfloat.c | 132 +++++++++++++++++++++++++++++++++++++++++++++
include/fpu/softfloat.h | 3 ++
3 files changed, 150 insertions(+)
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index 1cb3502e5a..4706a0ec3a 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -1163,6 +1163,21 @@ static floatx80 propagateFloatx80NaN(floatx80 a,
floatx80 b,
}
}
+#if defined(TARGET_M68K)
+static floatx80 propagateFloatx80NaNOneArg(floatx80 a, float_status *status)
+{
+ if (floatx80_is_signaling_nan(a, status)) {
+ float_raise(float_flag_invalid, status);
+ }
+
+ if (status->default_nan_mode) {
+ return floatx80_default_nan(status);
+ }
+
+ return floatx80_maybe_silence_nan(a, status);
+}
+#endif
+
#ifdef NO_SIGNALING_NANS
int float128_is_quiet_nan(float128 a_, float_status *status)
{
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index c6289bba75..a17e849fe7 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -5800,6 +5800,138 @@ floatx80 floatx80_mod(floatx80 a, floatx80 b,
float_status *status)
normalizeRoundAndPackFloatx80(
80, zSign, bExp + expDiff, aSig0, aSig1, status);
}
+
+/*----------------------------------------------------------------------------
+ | Returns the mantissa of the extended double-precision floating-point
+ | value `a'.
+
*----------------------------------------------------------------------------*/
+
+floatx80 floatx80_getman(floatx80 a, float_status *status)
+{
+ flag aSign;
+ int32_t aExp;
+ uint64_t aSig;
+
+ aSig = extractFloatx80Frac(a);
+ aExp = extractFloatx80Exp(a);
+ aSign = extractFloatx80Sign(a);
+
+ if (aExp == 0x7FFF) {
+ if ((uint64_t) (aSig << 1)) {
+ return propagateFloatx80NaNOneArg(a , status);
+ }
+ float_raise(float_flag_invalid , status);
+ return floatx80_default_nan(status);
+ }
+
+ if (aExp == 0) {
+ if (aSig == 0) {
+ return packFloatx80(aSign, 0, 0);
+ }
+ normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
+ }
+
+ return roundAndPackFloatx80(status->floatx80_rounding_precision, aSign,
+ 0x3FFF, aSig, 0, status);
+}
+
+/*----------------------------------------------------------------------------
+ | Returns the exponent of the extended double-precision floating-point
+ | value `a' as an extended double-precision value.
+
*----------------------------------------------------------------------------*/
+
+floatx80 floatx80_getexp(floatx80 a, float_status *status)
+{
+ flag aSign;
+ int32_t aExp;
+ uint64_t aSig;
+
+ aSig = extractFloatx80Frac(a);
+ aExp = extractFloatx80Exp(a);
+ aSign = extractFloatx80Sign(a);
+
+ if (aExp == 0x7FFF) {
+ if ((uint64_t) (aSig << 1)) {
+ return propagateFloatx80NaNOneArg(a , status);
+ }
+ float_raise(float_flag_invalid , status);
+ return floatx80_default_nan(status);
+ }
+
+ if (aExp == 0) {
+ if (aSig == 0) {
+ return packFloatx80(aSign, 0, 0);
+ }
+ normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
+ }
+
+ return int32_to_floatx80(aExp - 0x3FFF, status);
+}
+
+/*----------------------------------------------------------------------------
+ | Scales extended double-precision floating-point value in operand `a' by
+ | value `b'. The function truncates the value in the second operand 'b' to
+ | an integral value and adds that value to the exponent of the operand 'a'.
+ | The operation performed according to the IEC/IEEE Standard for Binary
+ | Floating-Point Arithmetic.
+
*----------------------------------------------------------------------------*/
+
+floatx80 floatx80_scale(floatx80 a, floatx80 b, float_status *status)
+{
+ flag aSign, bSign;
+ int32_t aExp, bExp, shiftCount;
+ uint64_t aSig, bSig;
+
+ aSig = extractFloatx80Frac(a);
+ aExp = extractFloatx80Exp(a);
+ aSign = extractFloatx80Sign(a);
+ bSig = extractFloatx80Frac(b);
+ bExp = extractFloatx80Exp(b);
+ bSign = extractFloatx80Sign(b);
+
+ if (bExp == 0x7FFF) {
+ if ((uint64_t) (bSig << 1) ||
+ ((aExp == 0x7FFF) && (uint64_t) (aSig << 1))) {
+ return propagateFloatx80NaN(a, b, status);
+ }
+ float_raise(float_flag_invalid , status);
+ return floatx80_default_nan(status);
+ }
+ if (aExp == 0x7FFF) {
+ if ((uint64_t) (aSig << 1)) {
+ return propagateFloatx80NaN(a, b, status);
+ }
+ return packFloatx80(aSign, floatx80_infinity_high,
+ floatx80_infinity_low);
+ }
+ if (aExp == 0) {
+ if (aSig == 0) {
+ return packFloatx80(aSign, 0, 0);
+ }
+ if (bExp < 0x3FFF) {
+ return a;
+ }
+ normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
+ }
+
+ if (bExp < 0x3FFF) {
+ return a;
+ }
+
+ if (0x400F < bExp) {
+ aExp = bSign ? -0x6001 : 0xE000;
+ return roundAndPackFloatx80(status->floatx80_rounding_precision,
+ aSign, aExp, aSig, 0, status);
+ }
+
+ shiftCount = 0x403E - bExp;
+ bSig >>= shiftCount;
+ aExp = bSign ? (aExp - bSig) : (aExp + bSig);
+
+ return roundAndPackFloatx80(status->floatx80_rounding_precision,
+ aSign, aExp, aSig, 0, status);
+
+}
#endif /* TARGET_M68K */
/*----------------------------------------------------------------------------
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 413cdb20cb..84ddcb12a1 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -630,6 +630,9 @@ floatx80 floatx80_div(floatx80, floatx80, float_status
*status);
floatx80 floatx80_rem(floatx80, floatx80, float_status *status);
floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status);
floatx80 floatx80_sqrt(floatx80, float_status *status);
+floatx80 floatx80_getman(floatx80 a, float_status *status);
+floatx80 floatx80_getexp(floatx80 a, float_status *status);
+floatx80 floatx80_scale(floatx80 a, floatx80 b, float_status *status);
int floatx80_eq(floatx80, floatx80, float_status *status);
int floatx80_le(floatx80, floatx80, float_status *status);
int floatx80_lt(floatx80, floatx80, float_status *status);
--
2.13.6
- [Qemu-devel] [PATCH v2 0/5] target/m68k: implement 680x0 FPU (part 3), Laurent Vivier, 2017/11/23
- [Qemu-devel] [PATCH v2 2/5] target/m68k: add fmod/frem, Laurent Vivier, 2017/11/23
- [Qemu-devel] [PATCH v2 3/5] softfloat: use floatx80_infinity in softfloat, Laurent Vivier, 2017/11/23
- [Qemu-devel] [PATCH v2 4/5] softfloat: add floatx80_getman(), floatx80_getexp(), floatx80_scale(),
Laurent Vivier <=
- [Qemu-devel] [PATCH v2 5/5] target-m68k: add fscale, fgetman and fgetexp, Laurent Vivier, 2017/11/23
- [Qemu-devel] [PATCH v2 1/5] softfloat: add floatx80_mod(), Laurent Vivier, 2017/11/23
- Re: [Qemu-devel] [PATCH v2 0/5] target/m68k: implement 680x0 FPU (part 3), Peter Maydell, 2017/11/29