Re: [Qemu-devel] [PATCH RFC 1/3] tcg: support MOV_VEC and MOVI_VEC opcodes in register allocator

[Richard Henderson]

On 11/09/2017 03:41 PM, Kirill Batuzov wrote:
> Signed-off-by: Kirill Batuzov <address@hidden>
> ---
>  tcg/tcg.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/tcg/tcg.c b/tcg/tcg.c
> index a7854a59a1..6db7dd526a 100644
> --- a/tcg/tcg.c
> +++ b/tcg/tcg.c
> @@ -3327,10 +3327,12 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
>          switch (opc) {
>          case INDEX_op_mov_i32:
>          case INDEX_op_mov_i64:
> +        case INDEX_op_mov_vec:
>              tcg_reg_alloc_mov(s, op);
>              break;
>          case INDEX_op_movi_i32:
>          case INDEX_op_movi_i64:
> +        case INDEX_op_movi_vec:
>              tcg_reg_alloc_movi(s, op);
>              break;
>          case INDEX_op_insn_start:
> 

Thanks.  I'd actually missed out on this myself until quite late in v6, which
caused a number of interesting problems.


r~