[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 20/34] ppc: spapr: define core types statically
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 20/34] ppc: spapr: define core types statically |
Date: |
Tue, 17 Oct 2017 15:21:38 +1100 |
From: Igor Mammedov <address@hidden>
spapr core type definition doesn't have any fields that
require it to be defined at runtime. So replace code
that fills in TypeInfo at runtime with static TypeInfo
array that does the same at complie time.
Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_cpu_core.c | 87 +++++++++++++----------------------------
include/hw/ppc/spapr_cpu_core.h | 2 +
2 files changed, 30 insertions(+), 59 deletions(-)
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index b6610dd431..550d320b5b 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -217,37 +217,6 @@ err:
error_propagate(errp, local_err);
}
-static const char *spapr_core_models[] = {
- /* 970 */
- "970_v2.2",
-
- /* 970MP variants */
- "970mp_v1.0",
- "970mp_v1.1",
-
- /* POWER5+ */
- "power5+_v2.1",
-
- /* POWER7 */
- "power7_v2.3",
-
- /* POWER7+ */
- "power7+_v2.1",
-
- /* POWER8 */
- "power8_v2.0",
-
- /* POWER8E */
- "power8e_v2.1",
-
- /* POWER8NVL */
- "power8nvl_v1.0",
-
- /* POWER9 */
- "power9_v1.0",
- "power9_v2.0",
-};
-
static Property spapr_cpu_core_properties[] = {
DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id,
CPU_UNSET_NUMA_NODE_ID),
DEFINE_PROP_END_OF_LIST()
@@ -265,33 +234,33 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void
*data)
g_assert(scc->cpu_class);
}
-static const TypeInfo spapr_cpu_core_type_info = {
- .name = TYPE_SPAPR_CPU_CORE,
- .parent = TYPE_CPU_CORE,
- .abstract = true,
- .instance_size = sizeof(sPAPRCPUCore),
- .class_size = sizeof(sPAPRCPUCoreClass),
-};
-
-static void spapr_cpu_core_register_types(void)
-{
- int i;
-
- type_register_static(&spapr_cpu_core_type_info);
-
- for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) {
- TypeInfo type_info = {
- .parent = TYPE_SPAPR_CPU_CORE,
- .instance_size = sizeof(sPAPRCPUCore),
- .class_init = spapr_cpu_core_class_init,
- .class_data = (void *) spapr_core_models[i],
- };
-
- type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE,
- spapr_core_models[i]);
- type_register(&type_info);
- g_free((void *)type_info.name);
+#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
+ { \
+ .parent = TYPE_SPAPR_CPU_CORE, \
+ .class_data = (void *) cpu_model, \
+ .class_init = spapr_cpu_core_class_init, \
+ .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
}
-}
-type_init(spapr_cpu_core_register_types)
+static const TypeInfo spapr_cpu_core_type_infos[] = {
+ {
+ .name = TYPE_SPAPR_CPU_CORE,
+ .parent = TYPE_CPU_CORE,
+ .abstract = true,
+ .instance_size = sizeof(sPAPRCPUCore),
+ .class_size = sizeof(sPAPRCPUCoreClass),
+ },
+ DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
+ DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
+};
+
+DEFINE_TYPES(spapr_cpu_core_type_infos)
diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
index 93051e9ecf..66dcf52587 100644
--- a/include/hw/ppc/spapr_cpu_core.h
+++ b/include/hw/ppc/spapr_cpu_core.h
@@ -21,6 +21,8 @@
#define SPAPR_CPU_CORE_GET_CLASS(obj) \
OBJECT_GET_CLASS(sPAPRCPUCoreClass, (obj), TYPE_SPAPR_CPU_CORE)
+#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE
+
typedef struct sPAPRCPUCore {
/*< private >*/
CPUCore parent_obj;
--
2.13.6
- [Qemu-devel] [PULL 22/34] ppc: spapr: register 'host' core type along with the rest of core types, (continued)
- [Qemu-devel] [PULL 22/34] ppc: spapr: register 'host' core type along with the rest of core types, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 24/34] ppc: move ppc_cpu_lookup_alias() before its first user, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 07/34] target/ppc: Fix carry flag setting for shift algebraic instructions, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 10/34] qom: add helper macro DEFINE_TYPES(), David Gibson, 2017/10/17
- [Qemu-devel] [PULL 15/34] ppc: replace cpu_model with cpu_type on ref405ep, taihu boards, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 23/34] ppc: spapr: use cpu model names as tcg defaults instead of aliases, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 08/34] hw/ppc/spapr.c: abort unplug_request if previous unplug isn't done, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 06/34] target/ppc: Add POWER9 DD2.0 model information, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 34/34] spapr_cpu_core: rewrite machine type sanity check, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 18/34] ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model(), David Gibson, 2017/10/17
- [Qemu-devel] [PULL 20/34] ppc: spapr: define core types statically,
David Gibson <=
- [Qemu-devel] [PULL 28/34] ppc: pnv: drop PnvCoreClass::cpu_oc field, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 21/34] ppc: spapr: use cpu type name directly, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 19/34] ppc: move '-cpu foo, compat=xxx' parsing into ppc_cpu_parse_featurestr(), David Gibson, 2017/10/17
- [Qemu-devel] [PULL 27/34] ppc: pnv: normalize core/chip type names, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 31/34] ppc: pnv: consolidate type definitions and batch register them, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 29/34] ppc: pnv: define core types statically, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 33/34] spapr_pci: fail gracefully with non-pseries machine types, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 17/34] ppc: 40p/prep: replace cpu_model with cpu_type, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 32/34] spapr: Correct RAM size calculation for HPT resizing, David Gibson, 2017/10/17
- [Qemu-devel] [PULL 30/34] ppc: pnv: drop PnvChipClass::cpu_model field, David Gibson, 2017/10/17