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[Qemu-devel] [PATCH 1/9] target/arm: Add M profile secure MMU index valu
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 1/9] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() |
Date: |
Mon, 9 Oct 2017 14:48:31 +0100 |
Add the M profile secure MMU index values to the switch in
get_a32_user_mem_index() so that LDRT/STRT work correctly
rather than asserting at translate time.
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index ab1a12a..e1b83b7 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -165,6 +165,10 @@ static inline int get_a32_user_mem_index(DisasContext *s)
case ARMMMUIdx_MPriv:
case ARMMMUIdx_MNegPri:
return arm_to_core_mmu_idx(ARMMMUIdx_MUser);
+ case ARMMMUIdx_MSUser:
+ case ARMMMUIdx_MSPriv:
+ case ARMMMUIdx_MSNegPri:
+ return arm_to_core_mmu_idx(ARMMMUIdx_MSUser);
case ARMMMUIdx_S2NS:
default:
g_assert_not_reached();
--
2.7.4
- Re: [Qemu-devel] [PATCH 7/9] target-arm: Simplify insn_crosses_page(), (continued)
- [Qemu-devel] [PATCH 6/9] target/arm: Pull Thumb insn word loads up to top level, Peter Maydell, 2017/10/09
- [Qemu-devel] [PATCH 3/9] target/arm: Implement BLXNS, Peter Maydell, 2017/10/09
- [Qemu-devel] [PATCH 5/9] target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1, Peter Maydell, 2017/10/09
- [Qemu-devel] [PATCH 2/9] target/arm: Implement SG instruction, Peter Maydell, 2017/10/09
- [Qemu-devel] [PATCH 9/9] target/arm: Implement SG instruction corner cases, Peter Maydell, 2017/10/09
- [Qemu-devel] [PATCH 1/9] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index(),
Peter Maydell <=
- [Qemu-devel] [PATCH 4/9] target/arm: Implement secure function return, Peter Maydell, 2017/10/09