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[Qemu-devel] [PATCH v2 11/30] s390x/kvm: pass ipb directly into handle_s
From: |
David Hildenbrand |
Subject: |
[Qemu-devel] [PATCH v2 11/30] s390x/kvm: pass ipb directly into handle_sigp() |
Date: |
Thu, 28 Sep 2017 22:36:49 +0200 |
No need to pass kvm_run. Pass parameters alphabetically ordered.
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
---
target/s390x/kvm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c
index 8dc82fbb59..43f8f7331a 100644
--- a/target/s390x/kvm.c
+++ b/target/s390x/kvm.c
@@ -1876,7 +1876,7 @@ static int sigp_set_architecture(S390CPU *cpu, uint32_t
param,
return SIGP_CC_STATUS_STORED;
}
-static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1)
+static int handle_sigp(S390CPU *cpu, uint8_t ipa1, uint32_t ipb)
{
CPUS390XState *env = &cpu->env;
const uint8_t r1 = ipa1 >> 4;
@@ -1890,7 +1890,7 @@ static int handle_sigp(S390CPU *cpu, struct kvm_run *run,
uint8_t ipa1)
cpu_synchronize_state(CPU(cpu));
/* get order code */
- order = decode_basedisp_rs(env, run->s390_sieic.ipb, NULL)
+ order = decode_basedisp_rs(env, ipb, NULL)
& SIGP_ORDER_MASK;
status_reg = &env->regs[r1];
param = (r1 % 2) ? env->regs[r1] : env->regs[r1 + 1];
@@ -1948,7 +1948,7 @@ static int handle_instruction(S390CPU *cpu, struct
kvm_run *run)
r = handle_diag(cpu, run, run->s390_sieic.ipb);
break;
case IPA0_SIGP:
- r = handle_sigp(cpu, run, ipa1);
+ r = handle_sigp(cpu, ipa1, run->s390_sieic.ipb);
break;
}
--
2.13.5
- [Qemu-devel] [PATCH v2 01/30] s390x/tcg: turn INTERRUPT_EXT into a mask, (continued)
- [Qemu-devel] [PATCH v2 01/30] s390x/tcg: turn INTERRUPT_EXT into a mask, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 02/30] s390x/tcg: cleanup service interrupt injection, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 03/30] s390x/tcg: injection of emergency signals and external calls, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 04/30] s390x/tcg: rework checking for deliverable interrupts, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 05/30] s390x/tcg: take care of external interrupt subclasses, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 06/30] s390x/tcg: STOPPED cpus can never wake up, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 07/30] s390x/tcg: a CPU cannot switch state due to an interrupt, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 08/30] target/s390x: factor out handling of WAIT PSW into s390_handle_wait(), David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 09/30] s390x/tcg: handle WAIT PSWs during interrupt injection, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 10/30] target/s390x: interpret PSW_MASK_WAIT only for TCG, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 11/30] s390x/kvm: pass ipb directly into handle_sigp(),
David Hildenbrand <=
- [Qemu-devel] [PATCH v2 12/30] s390x/kvm: generalize SIGP stop and restart interrupt injection, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 13/30] s390x/kvm: factor out storing of CPU status, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 14/30] s390x/kvm: factor out storing of adtl CPU status, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 15/30] s390x/kvm: drop two debug prints, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 16/30] s390x/kvm: factor out SIGP code into sigp.c, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 17/30] MAINTAINERS: use s390 KVM maintainers for target/s390x/sigp.c, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 18/30] s390x/kvm: factor out actual handling of STOP interrupts, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 20/30] s390x/tcg: implement SIGP SENSE, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 19/30] s390x/tcg: implement SIGP SENSE RUNNING STATUS, David Hildenbrand, 2017/09/28
- [Qemu-devel] [PATCH v2 21/30] s390x/tcg: implement SIGP EXTERNAL CALL, David Hildenbrand, 2017/09/28