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Re: [Qemu-devel] [PATCH 10/20] nvic: Add NS alias SCS region


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH 10/20] nvic: Add NS alias SCS region
Date: Tue, 5 Sep 2017 17:26:40 +0100

On 29 August 2017 at 17:00, Richard Henderson
<address@hidden> wrote:
> On 08/22/2017 08:08 AM, Peter Maydell wrote:
>> +    regionlen = arm_feature(&s->cpu->env, ARM_FEATURE_V8) ? 0x21000 : 
>> 0x1000;
>> +    memory_region_init(&s->container, OBJECT(s), "nvic", regionlen);
>>      /* The system register region goes at the bottom of the priority
>>       * stack as it covers the whole page.
>>       */
>> @@ -1185,6 +1242,13 @@ static void armv7m_nvic_realize(DeviceState *dev, 
>> Error **errp)
>>                                          sysbus_mmio_get_region(systick_sbd, 
>> 0),
>>                                          1);
>>
>> +    if (arm_feature(&s->cpu->env, ARM_FEATURE_V8)) {
>> +        memory_region_init_io(&s->sysreg_ns_mem, OBJECT(s),
>> +                              &nvic_sysreg_ns_ops, s,
>> +                              "nvic_sysregs_ns", 0x1000);
>> +        memory_region_add_subregion(&s->container, 0x20000, 
>> &s->sysreg_ns_mem);
>
> There's a whole in between the two regions, which you are leaving mapped.  Why
> create a sub-region instead of two separate top-level regions for which you 
> can
> leave the whole unmapped?

We don't map the hole. The container is 0x21000 in size, the normal
nvic_sysregs region is 0x1000 at offset 0x0 (which will be 0xe000e000
in the system address space), and the NS alias region
is 0x1000 at offset 0x20000 (0xe002e000 in the system address space).
There's nothing mapped in the hole in the container, so accesses
there will busfault, as they will for other PPB accesses before or
after the SCSes.

thanks
-- PMM



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