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Re: [Qemu-devel] [Qemu-arm] [PATCH 05/20] target/arm: Add MMU indexes fo
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [Qemu-arm] [PATCH 05/20] target/arm: Add MMU indexes for secure v8M |
Date: |
Fri, 25 Aug 2017 10:34:00 +0100 |
On 22 August 2017 at 16:08, Peter Maydell <address@hidden> wrote:
> Now that MPU lookups can return different results for v8M
> when the CPU is in secure vs non-secure state, we need to
> have separate MMU indexes; add the secure counterparts
> to the existing three M profile MMU indexes.
> @@ -2206,7 +2217,11 @@ static inline int cpu_mmu_index(CPUARMState *env, bool
> ifetch)
> */
> if ((env->v7m.exception > 0 && env->v7m.exception <= 3)
> || env->v7m.faultmask) {
> - return arm_to_core_mmu_idx(ARMMMUIdx_MNegPri);
> + mmu_idx = ARMMMUIdx_MNegPri;
> + }
Incidentally this is not exactly the right check to make when
the security extension is present, but at this point in the
series it's the best we can do (the right check requires us
to have exception banking support in the NVIC so we can
check secure HF and nonsecure HF separately); the patch to
do it right will come after the NVIC patches.
thanks
-- PMM
- Re: [Qemu-devel] [PATCH 11/20] target/arm: Make VTOR register banked for v8M, (continued)
- [Qemu-devel] [PATCH 17/20] target/arm: Make MMFAR banked for v8M, Peter Maydell, 2017/08/22
- [Qemu-devel] [PATCH 08/20] target/arm: Make FAULTMASK register banked for v8M, Peter Maydell, 2017/08/22
- [Qemu-devel] [PATCH 01/20] target/arm: Implement ARMv8M's PMSAv8 registers, Peter Maydell, 2017/08/22
- [Qemu-devel] [PATCH 03/20] target/arm: Add state field, feature bit and migration for v8M secure state, Peter Maydell, 2017/08/22
- [Qemu-devel] [PATCH 05/20] target/arm: Add MMU indexes for secure v8M, Peter Maydell, 2017/08/22
- [Qemu-devel] [PATCH 15/20] target/arm: Make MPU_CTRL register banked for v8M, Peter Maydell, 2017/08/22
- [Qemu-devel] [PATCH 13/20] target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M, Peter Maydell, 2017/08/22
- [Qemu-devel] [PATCH 02/20] target/arm: Implement new PMSAv8 behaviour, Peter Maydell, 2017/08/22
- [Qemu-devel] [PATCH 09/20] target/arm: Make CONTROL register banked for v8M, Peter Maydell, 2017/08/22
- [Qemu-devel] [PATCH 14/20] target/arm: Make MPU_RNR register banked for v8M, Peter Maydell, 2017/08/22