Re: [Qemu-devel] [PATCH v3] target-i386/cpu: Add new EPYC CPU model

[Brijesh Singh]

Hi Paolo,


On 8/17/17 1:37 PM, Brijesh Singh wrote:
> On 08/17/2017 11:45 AM, Paolo Bonzini wrote:
>> On 15/08/2017 19:00, Brijesh Singh wrote:
>>>
>>> The following features bits have been added/removed compare to
>>> Opteron_G5
>>>
>>> Added: monitor, movbe, rdrand, mmxext, ffxsr, rdtscp, cr8legacy, osvw,
>>>         fsgsbase, bmi1, avx2, smep, bmi2, rdseed, adx, smap,
>>> clfshopt, sha
>>>         xsaveopt, xsavec, xgetbv1, arat
>>>
>>> Removed: xop, fma4, tbm
>>
>> Interesting, why were these removed?
>>
>
> I don't know exact reason why these were removed - I am going with
> whatever is
> listed as supported feature bit in PPR [1], but I will ask around and
> let you
> know. I believe some of these instruction are superseded with newer
> instructions
> (e.g fma4->fma)
>
> [1]
> http://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf
>
>

I checked with CPU team, it seems those instruction sets were never
really used, I believe AMD came up with them but they were superseded by
SSE4/AVX extensions.

-Brijesh