[Qemu-devel] [PATCH for-2.10] target/mips: remove MIPS16 ASE from 4Km

[Philippe Mathieu-Daudé]

MIPS32 4Km does not support the MIPS16 instruction set, see:
    MIPS32 4K Processor Core Family Software UM (MD00016 Rev 01.18)

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
probably incorrect copy/paste from 8d162c2b68db72623a507069fda0e35ccd1c6b85

 target/mips/translate_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
index 255d25bacd..7297c8c000 100644
--- a/target/mips/translate_init.c
+++ b/target/mips/translate_init.c
@@ -149,7 +149,7 @@ static const mips_def_t mips_defs[] =
         .CP0_Status_rw_bitmask = 0x1258FF17,
         .SEGBITS = 32,
         .PABITS = 32,
-        .insn_flags = CPU_MIPS32 | ASE_MIPS16,
+        .insn_flags = CPU_MIPS32,
         .mmu_type = MMU_TYPE_FMT,
     },
     {
-- 
2.13.3