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[Qemu-devel] [PULL 00/14] target-mips queue


From: Yongbok Kim
Subject: [Qemu-devel] [PULL 00/14] target-mips queue
Date: Fri, 21 Jul 2017 03:37:01 +0100

The following changes since commit 25d0233c1ac6cd14a15fcc834f1de3b179037b1d:

  Merge remote-tracking branch 'remotes/kraxel/tags/ui-20170720-pull-request' 
into staging (2017-07-20 16:40:01 +0100)

are available in the git repository at:

  git://github.com/yongbok/upstream-qemu.git tags/mips-20170721

for you to fetch changes up to bad63a8008a0aaefcd00542c89bee01623d7c9de:

  target/mips: Enable CP0_EBase.WG on MIPS64 CPUs (2017-07-21 03:23:44 +0100)

----------------------------------------------------------------
MIPS patches 2017-07-21

Changes:
* Add Enhanced Virtual Addressing (EVA) support

----------------------------------------------------------------


James Hogan (14):
  target/mips: Fix MIPS64 MFC0 UserLocal on BE host
  target/mips: Fix TLBWI shadow flush for EHINV,XI,RI
  target/mips: Weaken TLB flush on UX,SX,KX,ASID changes
  target/mips: Add CP0_Ebase.WG (write gate) support
  target/mips: Prepare loads/stores for EVA
  target/mips: Decode MIPS32 EVA load & store instructions
  target/mips: Decode microMIPS EVA load & store instructions
  target/mips: Check memory permissions with mem_idx
  target/mips: Abstract mmu_idx from hflags
  target/mips: Add an MMU mode for ERL
  target/mips: Add segmentation control registers
  target/mips: Implement segmentation control
  target/mips: Add EVA support to P5600
  target/mips: Enable CP0_EBase.WG on MIPS64 CPUs

 target/mips/cpu.h            |  58 ++++++-
 target/mips/helper.c         | 224 ++++++++++++++++++------
 target/mips/helper.h         |   3 +
 target/mips/machine.c        |   9 +-
 target/mips/op_helper.c      |  64 ++++++-
 target/mips/translate.c      | 405 ++++++++++++++++++++++++++++++++++++++-----
 target/mips/translate_init.c |  17 +-
 7 files changed, 660 insertions(+), 120 deletions(-)

-- 
2.7.4




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