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[Qemu-devel] [RFC PATCH for 2.11 21/23] fpu/softfloat2a: propagate signa
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [RFC PATCH for 2.11 21/23] fpu/softfloat2a: propagate signalling NaNs in MINMAX |
Date: |
Thu, 20 Jul 2017 16:04:24 +0100 |
While a comparison between a QNaN and a number will return the number
it is not the same with a signaling NaN. In this case the SNaN will
"win" and after potentially raising an exception it will be quietened.
Signed-off-by: Alex Bennée <address@hidden>
---
fpu/softfloat2a/softfloat.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/fpu/softfloat2a/softfloat.c b/fpu/softfloat2a/softfloat.c
index 67115298bd..5e918cc208 100644
--- a/fpu/softfloat2a/softfloat.c
+++ b/fpu/softfloat2a/softfloat.c
@@ -7684,6 +7684,7 @@ int float128_compare_quiet(float128 a, float128 b,
float_status *status)
* minnum() and maxnum() functions. These are similar to the min()
* and max() functions but if one of the arguments is a QNaN and
* the other is numerical then the numerical argument is returned.
+ * SNaNs will get quietened before being returned.
* minnum() and maxnum correspond to the IEEE 754-2008 minNum()
* and maxNum() operations. min() and max() are the typical min/max
* semantics provided by many CPUs which predate that specification.
@@ -7704,11 +7705,14 @@ static inline float ## s float ## s ## _minmax(float ##
s a, float ## s b, \
if (float ## s ## _is_any_nan(a) || \
float ## s ## _is_any_nan(b)) { \
if (isieee) { \
- if (float ## s ## _is_quiet_nan(a, status) && \
+ if (float ## s ## _is_signaling_nan(a, status) || \
+ float ## s ## _is_signaling_nan(b, status)) { \
+ propagateFloat ## s ## NaN(a, b, status); \
+ } else if (float ## s ## _is_quiet_nan(a, status) && \
!float ## s ##_is_any_nan(b)) { \
return b; \
} else if (float ## s ## _is_quiet_nan(b, status) && \
- !float ## s ## _is_any_nan(a)) { \
+ !float ## s ## _is_any_nan(a)) { \
return a; \
} \
} \
--
2.13.0
- [Qemu-devel] [RFC PATCH for 2.11 15/23] target/arm/translate-a64.c: AdvSIMD scalar 2 register misc decode, (continued)
- [Qemu-devel] [RFC PATCH for 2.11 15/23] target/arm/translate-a64.c: AdvSIMD scalar 2 register misc decode, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 22/23] fpu/softfloat2a: improve comments on ARM NaN propagation, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 23/23] target/arm: implement half-precision F(MIN|MAX)(V|NMV), Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 18/23] fpu/softfloat2a: implement float16_squash_input_denormal, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 14/23] target/arm/translate-a64.c: add ARMv8.2 fadd scalar half-precision, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 19/23] fpu/softfloat2a: implement float16_abs helper, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 21/23] fpu/softfloat2a: propagate signalling NaNs in MINMAX,
Alex Bennée <=
- [Qemu-devel] [RFC PATCH for 2.11 16/23] include/exec/helper-head.h: support f16 in helper calls, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 20/23] fpu/softfloat2a: add half-precision expansions for MINMAX fns, Alex Bennée, 2017/07/20
- Re: [Qemu-devel] [RFC PATCH for 2.11 00/23] Implementing FP16 for ARMv8.2 using SoftFloat2a and 3c, Peter Maydell, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 02/23] fpu: import SoftFloat3c, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 03/23] softfloat3c: dos2unix all files, Alex Bennée, 2017/07/20