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[Qemu-devel] [PATCH v14 34/34] target/arm: Perform per-insn cross-page c
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v14 34/34] target/arm: Perform per-insn cross-page check only for Thumb |
Date: |
Fri, 14 Jul 2017 23:42:43 -1000 |
ARM is a fixed-length ISA and we can compute the page crossing
condition exactly once during init_disas_context.
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 57 +++++++++++++++++++++++++++++---------------------
1 file changed, 33 insertions(+), 24 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index d7c3c10..5b6368f 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -11850,6 +11850,13 @@ static int arm_tr_init_disas_context(DisasContextBase
*dcbase,
max_insns = 1;
}
+ /* ARM is a fixed-length ISA. Bound the number of insns to execute
+ to those left on the page. */
+ if (!dc->thumb) {
+ int bound = (dc->next_page_start - dc->base.pc_first) / 4;
+ max_insns = MIN(max_insns, bound);
+ }
+
cpu_F0s = tcg_temp_new_i32();
cpu_F1s = tcg_temp_new_i32();
cpu_F0d = tcg_temp_new_i64();
@@ -11978,29 +11985,8 @@ static bool arm_pre_translate_insn(DisasContext *dc)
return false;
}
-static void arm_post_translate_insn(CPUARMState *env, DisasContext *dc)
+static void arm_post_translate_insn(DisasContext *dc)
{
- /* Translation stops when a conditional branch is encountered.
- * Otherwise the subsequent code could get translated several times.
- * Also stop translation when a page boundary is reached. This
- * ensures prefetch aborts occur at the right place.
- *
- * We want to stop the TB if the next insn starts in a new page,
- * or if it spans between this page and the next. This means that
- * if we're looking at the last halfword in the page we need to
- * see if it's a 16-bit Thumb insn (which will fit in this TB)
- * or a 32-bit Thumb insn (which won't).
- * This is to avoid generating a silly TB with a single 16-bit insn
- * in it at the end of this page (which would execute correctly
- * but isn't very efficient).
- */
- if (dc->base.is_jmp == DISAS_NEXT
- && (dc->pc >= dc->next_page_start
- || (dc->pc >= dc->next_page_start - 3
- && insn_crosses_page(env, dc)))) {
- dc->base.is_jmp = DISAS_TOO_MANY;
- }
-
if (dc->condjmp && !dc->base.is_jmp) {
gen_set_label(dc->condlabel);
dc->condjmp = 0;
@@ -12023,7 +12009,10 @@ static void arm_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
dc->pc += 4;
disas_arm_insn(dc, insn);
- arm_post_translate_insn(env, dc);
+ /* ARM is a fixed-length ISA. We performed the cross-page check
+ in init_disas_context by adjusting max_insns. */
+
+ arm_post_translate_insn(dc);
}
static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
@@ -12047,7 +12036,27 @@ static void thumb_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
}
}
- arm_post_translate_insn(env, dc);
+ /* Thumb is a variable-length ISA. Stop translation when the next insn
+ * will touch a new page. This ensures that prefetch aborts occur at
+ * the right place.
+ *
+ * We want to stop the TB if the next insn starts in a new page,
+ * or if it spans between this page and the next. This means that
+ * if we're looking at the last halfword in the page we need to
+ * see if it's a 16-bit Thumb insn (which will fit in this TB)
+ * or a 32-bit Thumb insn (which won't).
+ * This is to avoid generating a silly TB with a single 16-bit insn
+ * in it at the end of this page (which would execute correctly
+ * but isn't very efficient).
+ */
+ if (dc->base.is_jmp == DISAS_NEXT
+ && (dc->pc >= dc->next_page_start
+ || (dc->pc >= dc->next_page_start - 3
+ && insn_crosses_page(env, dc)))) {
+ dc->base.is_jmp = DISAS_TOO_MANY;
+ }
+
+ arm_post_translate_insn(dc);
}
static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
--
2.9.4
- Re: [Qemu-devel] [PATCH v14 30/34] target/arm: [tcg] Port to generic translation framework, (continued)