Re: [Qemu-devel] [PATCH v3 1/7] target/m68k: add fscc.

[Laurent Vivier]

Le 27/06/2017 à 22:00, Richard Henderson a écrit :
> On 06/27/2017 12:12 PM, Laurent Vivier wrote:
>>       case 3:  /* Ordered Greater than or Equal Z || !(A || N) */
>>       case 19: /* Greater than or Equal Z || !(A || N) */
>> +        g_assert(FPSR_CC_A == (FPSR_CC_N >> 3));
>> +        c->v1 = tcg_temp_new();
>> +        c->g1 = 0;
>> +        tcg_gen_shli_i32(c->v1, fpsr, 3);
>> +        tcg_gen_or_i32(c->v1, c->v1, fpsr);
>> +        tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N);
>> +        tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_N | FPSR_CC_Z);
>> +        c->tcond = TCG_COND_NE;
> 
> Still with the unmasked shift.
> 
>     tcg_gen_not_i32(c->v1, fpsr);
>     tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_A | FPSR_CC_N);
>     tcg_gen_andi_i32(fpsr, fpsr, FPSR_CC_Z);
>     tcg_gen_or_i32(c->v1, c->v1, fpsr);
> 
> 
>>       case 5:  /* Ordered Less than or Equal Z || (N && !A) */
>>       case 21: /* Less than or Equal Z || (N && !A) */
>> +        g_assert(FPSR_CC_A == (FPSR_CC_N >> 3));
>> +        c->v1 = tcg_temp_new();
>> +        c->g1 = 0;
>> +        tcg_gen_xori_i32(c->v1, fpsr, FPSR_CC_A);
>> +        tcg_gen_shli_i32(c->v1, c->v1, 3);
>> +        tcg_gen_ori_i32(c->v1, c->v1, FPSR_CC_Z);
>> +        tcg_gen_and_i32(c->v1, c->v1, fpsr);
>> +        c->tcond = TCG_COND_NE;
> 
> Likewise.
> 
>     tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A);
>     tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_A));
>     tcg_gen_andc_i32(c->v1, fpsr, c->v1);
>     tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_Z | FPSR_CC_N);
> 
> 
>>       case 10: /* Unordered or Greater Than A || !(N || Z)) */
>>       case 26: /* Not Less or Equal A || !(N || Z)) */
>> +        g_assert(FPSR_CC_Z == (FPSR_CC_N >> 1));
>> +        c->v1 = tcg_temp_new();
>> +        c->g1 = 0;
>> +        tcg_gen_shli_i32(c->v1, fpsr, 1);
>> +        tcg_gen_or_i32(c->v1, c->v1, fpsr);
>> +        tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N);
>> +        tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_N | FPSR_CC_A);
>> +        c->tcond = TCG_COND_NE;
> 
> Likewise.
> 
>     tcg_gen_not_i32(c->v1, fpsr);
>     tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_Z | FPSR_CC_N);
>     tcg_gen_andi_i32(fpsr, fpsr, FPSR_CC_A);
>     tcg_gen_or_i32(c->v1, c->v1, fpsr);
> 
> 
>>       case 12: /* Unordered or Less Than A || (N && !Z) */
>>       case 28: /* Not Greater than or Equal A || (N && !Z) */
>> +        c->v1 = tcg_temp_new();
>> +        c->g1 = 0;
>> +        tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z);
>> +        tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) -
>> ctz32(FPSR_CC_Z));
>> +        tcg_gen_andc_i32(c->v1, fpsr, c->v1);
>> +        tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_A | FPSR_CC_N);
>> +        c->tcond = TCG_COND_NE;
> 
> I hadn't meant that this was the only one to fix.
> 

Thank you Richard, but all these changes break something somewhere, I'm
searching why.

Thanks,
Laurent